Lines Matching +full:panel +full:- +full:timing

2 # SPDX-License-Identifier: Apache-2.0
4 # Common fields for panel timings
5 # inherited from Linux panel bindings.
8   Common timing settings for display panels. These timings can be added to
9   a panel under display-timings node. For example:
12     display-timings {
13       compatible = "zephyr,panel-timing";
14       hsync-len = <8>;
15       hfront-porch = <32>;
16       hback-porch = <32>;
17       vsync-len = <2>;
18       vfront-porch = <16>;
19       vback-porch = <14>;
20       hsync-active = <0>;
21       vsync-active = <0>;
22       de-active = <1>;
23       pixelclk-active = <0>;
24       clock-frequency = <62346240>;
28 compatible: "zephyr,panel-timing"
31   clock-frequency:
35       (height + vsync-len + vfront-porch + vback-porch) *
36       (width + hsync-len + hfront-porch + hback-porch) *
39   hsync-len:
43       Horizontal synchronization pulse duration of panel driven by this
46   vsync-len:
50       Vertical synchronization pulse duration of panel driven by this
53   hback-porch:
57       Horizontal back porch duration of panel driven by this controller,
60   vback-porch:
64       Vertical back porch duration of panel driven by this controller, in lines
66   hfront-porch:
70       Horizontal front porch duration of panel driven by this controller,
73   vfront-porch:
77       Vertical front porch duration of panel driven by this controller, in lines
79   hsync-active:
83       - 0
84       - 1
90   vsync-active:
94       - 0
95       - 1
101   de-active:
105       - 0
106       - 1
112   pixelclk-active:
116       - 0
117       - 1
123   syncclk-active:
126       - 0
127       - 1
130       then the controller uses the setup specified by pixelclk-active.