Lines Matching +full:clock +full:- +full:prescaler

2 # SPDX-License-Identifier: Apache-2.0
5   STM32WB0 Reset and Clock controller node for STM32WB0 devices
6   This node is in charge of the system clock ('SYSCLK') source
9 compatible: "st,stm32wb0-rcc"
11 include: [clock-controller.yaml, base.yaml]
17   "#clock-cells":
20   clock-frequency:
24       default frequency in Hz for clock output
26   slow-clock:
29       Slow clock source selection.
30       On STM32WB0, all slow clock devices are clocked from the same
31       slow clock source, which is selected by this property.
33       The slow clock can be either clk_lsi, clk_lse, or clk_16mhz_div512.
35   clksys-prescaler:
39       - 1
40       - 2
41       - 4
42       - 8
43       - 16
44       - 32
45       - 64
47       CLK_SYS prescaler. Defines actual core clock frequency (CLK_SYS) based
49       The CLK_SYS is used to clock the CPU, AHB, APB, memories and PKA.
51       NOTE: if the 32MHz HSE is used as SYSCLK source, the prescaler cannot
54 clock-cells:
55   - bus
56   - bits