Lines Matching +full:pll +full:- +full:clocks

2 # SPDX-License-Identifier: Apache-2.0
5   STM32F411 PLL I2S node binding:
7   Fully configurable I2S dedicated PLL.
9   1 output clocks supported, the frequency can be computed with the following formula:
11     f(PLLI2S_R) = f(VCO clock) / PLLI2S R  --> PLLI2S
13       with f(VCO clock) = f(PLL I2S clock input) × (PLLI2S N / PLLI2S M)
16 compatible: "st,stm32f411-plli2s-clock"
18 include: st,stm32f4-plli2s-clock.yaml
21   div-m:
25         Division factor for the PLL input clock
26         Valid range: 2 - 63
28   div-q:
31         PLLI2S division factor for I2S Clocks to supply USB/SDIO/RNG
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