Lines Matching full:peripheral

7   clocks for AHB (Advanced High Performance) and APB (Advanced Peripheral) bus domains.
16   Last, peripheral bus clocks (typically PCLK1, PCLK2) should be configured using matching
29   To specify a gated clock, a peripheral should define a "clocks" property encoded
37   the bus controlling the peripheral and the second index specifies the bit used to
38   control the peripheral clock in that bus register.
39   The gated clock is required when accessing to the peripheral controller is needed
41   also used for peripheral operation.
55   register while the gated clock is off. As it doesn't feed the peripheral's controller, it
56   allows peripheral operation, but can't be used for peripheral configuration.
57   It is peripheral driver's responsibility to query and use clock source information in
60   Since the peripheral subsystem rate is dictated by the clock used for peripheral
66   Note 2: Default peripheral clock configuration (ie the one provided in *.dsti files)
68           what is the reset value of the clock source for each peripheral.