Lines Matching +full:0 +full:x100
17 #size-cells= <0>;
19 cpu@0 {
23 reg = <0x0>;
30 reg = <0x100>;
37 reg = <0x200>;
44 reg = <0x300>;
50 reg = <0x1d000000 0x10000>, /* GICD */
51 <0x1d060000 0x80000>; /* GICR */
60 reg = <0x1d040000 0x20000>;
76 reg = <0x10d12000 0x1000>;
81 reg = <0x10d10000 0x1000>;
93 reg = <0x10d13000 0x1000>;
98 reg = <0x80100000 DT_SIZE_M(8)>;
108 reg = <0x10c02000 0x100>;
119 reg = <0x10D11000 0x100>;
127 reg = <0x10808000 0x1000>,
128 <0x10B92000 0x1000>;
143 reg = <0x10c03000 0x100>;
154 reg = <0x10c03100 0x100>;
165 reg = <0x10D00000 0x100>;
176 reg = <0x10D00100 0x100>;
183 reg = <0x10d00200 0x100>;
191 reg = <0x10d00300 0x100>;
199 reg = <0x10d00400 0x100>;
207 reg = <0x10d00500 0x100>;
215 reg = <0x10d00600 0x100>;
231 reg = <0x10B80000 0X10000>,
232 <0x10840000 0x10000>;
238 block-size = <0x20000>;
239 data-rate-mode = <0>;
246 reg = <0x10DB0000 0x1000>;
264 reg = <0x10DC0000 0x1000>;
280 reg = <0x10810000 0x10000>;
295 #size-cells = <0>;
296 reg = <0x10810000 0x10000>;
304 reg = <0x10820000 0x10000>;
319 #size-cells = <0>;
320 reg = <0x10820000 0x10000>;
328 reg = <0x10830000 0x10000>;
343 #size-cells = <0>;
344 reg = <0x10830000 0x10000>;