Lines Matching +full:stm32 +full:- +full:dma +full:- +full:v2
2 * Copyright (c) 2023-2024 STMicroelectronics
4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
10 #include <zephyr/dt-bindings/clock/stm32wba_clock.h>
11 #include <zephyr/dt-bindings/reset/stm32wba_reset.h>
12 #include <zephyr/dt-bindings/adc/stm32u5_adc.h>
13 #include <zephyr/dt-bindings/gpio/gpio.h>
14 #include <zephyr/dt-bindings/i2c/i2c.h>
15 #include <zephyr/dt-bindings/pwm/pwm.h>
16 #include <zephyr/dt-bindings/adc/adc.h>
17 #include <zephyr/dt-bindings/dma/stm32_dma.h>
24 zephyr,flash-controller = &flash;
25 st,lptim-stdby-timer = &rtc;
26 zephyr,bt-hci = &bt_hci_wba;
30 #address-cells = <1>;
31 #size-cells = <0>;
35 compatible = "arm,cortex-m33";
38 cpu-power-states = <&stop0 &stop1>;
39 #address-cells = <1>;
40 #size-cells = <1>;
43 compatible = "arm,armv8m-mpu";
48 power-states {
50 compatible = "zephyr,power-state";
51 power-state-name = "suspend-to-idle";
52 substate-id = <1>;
53 min-residency-us = <100>;
56 compatible = "zephyr,power-state";
57 power-state-name = "suspend-to-idle";
58 substate-id = <2>;
59 min-residency-us = <500>;
62 compatible = "zephyr,power-state";
63 power-state-name = "suspend-to-ram";
64 substate-id = <1>;
65 min-residency-us = <1000>;
66 exit-latency-us = <50>;
72 compatible = "mmio-sram";
77 compatible = "zephyr,memory-region", "mmio-sram";
80 zephyr,memory-region = "SRAM6";
81 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
85 clk_hse: clk-hse {
86 #clock-cells = <0>;
87 compatible = "st,stm32wba-hse-clock";
88 clock-frequency = <DT_FREQ_M(32)>;
92 clk_hsi: clk-hsi {
93 #clock-cells = <0>;
94 compatible = "fixed-clock";
95 clock-frequency = <DT_FREQ_M(16)>;
99 clk_lse: clk-lse {
100 #clock-cells = <0>;
101 compatible = "st,stm32-lse-clock";
102 clock-frequency = <32768>;
103 driving-capability = <1>;
107 clk_lsi: clk-lsi {
108 #clock-cells = <0>;
109 compatible = "fixed-clock";
110 clock-frequency = <DT_FREQ_K(32)>;
115 #clock-cells = <0>;
116 compatible = "st,stm32wba-pll-clock";
122 flash: flash-controller@40022000 {
123 compatible = "st,stm32-flash-controller", "st,stm32wba-flash-controller";
127 #address-cells = <1>;
128 #size-cells = <1>;
131 compatible = "st,stm32-nv-flash", "soc-nv-flash";
133 write-block-size = <16>;
134 erase-block-size = <8192>;
136 max-erase-time = <5>;
141 compatible = "st,stm32wba-rcc";
142 clocks-controller;
143 #clock-cells = <2>;
146 rctl: reset-controller {
147 compatible = "st,stm32-rcc-rctl";
148 #reset-cells = <1>;
152 exti: interrupt-controller@46022000 {
153 compatible = "st,stm32g0-exti", "st,stm32-exti";
154 interrupt-controller;
155 #interrupt-cells = <1>;
157 num-lines = <16>;
162 interrupt-names = "line0", "line1", "line2", "line3",
166 line-ranges = <0 1>, <1 1>, <2 1>, <3 1>,
172 pinctrl: pin-controller@42020000 {
173 compatible = "st,stm32-pinctrl";
174 #address-cells = <1>;
175 #size-cells = <1>;
179 compatible = "st,stm32-gpio";
180 gpio-controller;
181 #gpio-cells = <2>;
187 compatible = "st,stm32-gpio";
188 gpio-controller;
189 #gpio-cells = <2>;
195 compatible = "st,stm32-gpio";
196 gpio-controller;
197 #gpio-cells = <2>;
203 compatible = "st,stm32-gpio";
204 gpio-controller;
205 #gpio-cells = <2>;
212 compatible = "st,stm32-rtc";
216 alarms-count = <2>;
221 compatible = "st,stm32-watchdog";
227 compatible = "st,stm32-window-watchdog";
235 compatible = "st,stm32-usart", "st,stm32-uart";
244 compatible = "st,stm32-usart", "st,stm32-uart";
253 compatible = "st,stm32-lpuart", "st,stm32-uart";
262 compatible = "st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi";
263 #address-cells = <1>;
264 #size-cells = <0>;
272 compatible = "st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi";
273 #address-cells = <1>;
274 #size-cells = <0>;
282 compatible = "st,stm32-i2c-v2";
283 clock-frequency = <I2C_BITRATE_STANDARD>;
284 #address-cells = <1>;
285 #size-cells = <0>;
289 interrupt-names = "event", "error";
294 compatible = "st,stm32-i2c-v2";
295 clock-frequency = <I2C_BITRATE_STANDARD>;
296 #address-cells = <1>;
297 #size-cells = <0>;
301 interrupt-names = "event", "error";
306 compatible = "st,stm32-timers";
311 interrupt-names = "brk", "up", "trgcom", "cc";
316 compatible = "st,stm32-counter";
321 compatible = "st,stm32-pwm";
323 #pwm-cells = <3>;
328 compatible = "st,stm32-timers";
333 interrupt-names = "global";
338 compatible = "st,stm32-counter";
343 compatible = "st,stm32-pwm";
345 #pwm-cells = <3>;
350 compatible = "st,stm32-timers";
355 interrupt-names = "global";
360 compatible = "st,stm32-counter";
365 compatible = "st,stm32-pwm";
367 #pwm-cells = <3>;
372 compatible = "st,stm32-timers";
377 interrupt-names = "global";
381 compatible = "st,stm32-counter";
386 compatible = "st,stm32-pwm";
388 #pwm-cells = <3>;
393 compatible = "st,stm32-timers";
398 interrupt-names = "global";
402 compatible = "st,stm32-counter";
407 compatible = "st,stm32-pwm";
409 #pwm-cells = <3>;
414 compatible = "st,stm32-adc";
420 #io-channel-cells = <1>;
425 sampling-times = <2 4 8 13 20 40 80 815>;
426 num-sampling-time-common-channels = <2>;
427 st,adc-clock-source = "ASYNC";
428 st,adc-sequencer = "NOT_FULLY_CONFIGURABLE";
429 st,adc-oversampler = "OVERSAMPLER_MINIMAL";
433 compatible = "st,stm32-lptim";
434 #address-cells = <1>;
435 #size-cells = <0>;
439 interrupt-names = "wakeup";
444 compatible = "st,stm32-lptim";
445 #address-cells = <1>;
446 #size-cells = <0>;
450 interrupt-names = "wakeup";
455 compatible = "st,stm32-rng";
460 nist-config = <0xf00d>;
461 health-test-config = <0xaac7>;
465 gpdma1: dma@40020000 {
466 compatible = "st,stm32u5-dma";
467 #dma-cells = <3>;
471 dma-channels = <8>;
472 dma-requests = <52>;
473 dma-offset = <0>;
479 compatible = "st,stm32-temp-cal";
480 ts-cal1-addr = <0x0BF90710>;
481 ts-cal2-addr = <0x0BF90742>;
482 ts-cal1-temp = <30>;
483 ts-cal2-temp = <130>;
484 ts-cal-vrefanalog = <3000>;
485 io-channels = <&adc4 13>;
490 compatible = "st,hci-stm32wba";
495 compatible = "swj-connector";
496 pinctrl-0 = <&debug_jtms_swdio_pa13 &debug_jtck_swclk_pa14
499 pinctrl-1 = <&analog_pa13 &analog_pa14 &analog_pa15
501 pinctrl-names = "default", "sleep";
505 compatible = "st,stm32-smbus";
506 #address-cells = <1>;
507 #size-cells = <0>;
513 compatible = "st,stm32-smbus";
514 #address-cells = <1>;
515 #size-cells = <0>;
522 arm,num-irq-priority-bits = <4>;