Lines Matching +full:stm32 +full:- +full:dma +full:- +full:v2
6 * SPDX-License-Identifier: Apache-2.0
10 #include <arm/armv8-m.dtsi>
11 #include <zephyr/dt-bindings/clock/stm32l4_clock.h>
12 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #include <zephyr/dt-bindings/i2c/i2c.h>
14 #include <zephyr/dt-bindings/pwm/pwm.h>
15 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
16 #include <zephyr/dt-bindings/dma/stm32_dma.h>
17 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
18 #include <zephyr/dt-bindings/reset/stm32g4_l4_5_reset.h>
19 #include <zephyr/dt-bindings/adc/adc.h>
20 #include <zephyr/dt-bindings/flash_controller/ospi.h>
26 zephyr,flash-controller = &flash;
30 #address-cells = <1>;
31 #size-cells = <0>;
35 compatible = "arm,cortex-m33";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 cpu-power-states = <&stop0 &stop1 &stop2>;
42 compatible = "arm,armv8m-mpu";
47 power-states {
49 compatible = "zephyr,power-state";
50 power-state-name = "suspend-to-idle";
51 substate-id = <1>;
52 min-residency-us = <100>;
55 compatible = "zephyr,power-state";
56 power-state-name = "suspend-to-idle";
57 substate-id = <2>;
58 min-residency-us = <500>;
61 compatible = "zephyr,power-state";
62 power-state-name = "suspend-to-idle";
63 substate-id = <3>;
64 min-residency-us = <900>;
70 compatible = "mmio-sram";
74 clk_hse: clk-hse {
75 #clock-cells = <0>;
76 compatible = "st,stm32-hse-clock";
80 clk_hsi: clk-hsi {
81 #clock-cells = <0>;
82 compatible = "fixed-clock";
83 clock-frequency = <DT_FREQ_M(16)>;
87 clk_hsi48: clk-hsi48 {
88 #clock-cells = <0>;
89 compatible = "fixed-clock";
90 clock-frequency = <DT_FREQ_M(48)>;
94 clk_msi: clk-msi {
95 #clock-cells = <0>;
96 compatible = "st,stm32-msi-clock";
97 msi-range = <6>; /* 4MHz (reset value) */
101 clk_lse: clk-lse {
102 #clock-cells = <0>;
103 compatible = "st,stm32-lse-clock";
104 clock-frequency = <32768>;
105 driving-capability = <0>;
109 clk_lsi: clk-lsi {
110 #clock-cells = <0>;
111 compatible = "fixed-clock";
112 clock-frequency = <DT_FREQ_K(32)>;
117 #clock-cells = <0>;
118 compatible = "st,stm32l4-pll-clock";
124 flash: flash-controller@40022000 {
125 compatible = "st,stm32-flash-controller", "st,stm32l5-flash-controller";
130 #address-cells = <1>;
131 #size-cells = <1>;
134 compatible = "st,stm32-nv-flash", "soc-nv-flash";
135 write-block-size = <8>;
136 erase-block-size = <2048>;
140 * for a 2K(dual-bank) page.
142 max-erase-time = <25>;
147 compatible = "st,stm32-rcc";
148 clocks-controller;
149 #clock-cells = <2>;
151 undershoot-prevention;
153 rctl: reset-controller {
154 compatible = "st,stm32-rcc-rctl";
155 #reset-cells = <1>;
159 exti: interrupt-controller@4000f400 {
160 compatible = "st,stm32g0-exti", "st,stm32-exti";
161 interrupt-controller;
162 #interrupt-cells = <1>;
164 num-lines = <16>;
169 interrupt-names = "line0", "line1", "line2", "line3",
173 line-ranges = <0 1>, <1 1>, <2 1>, <3 1>,
179 pinctrl: pin-controller@42020000 {
180 compatible = "st,stm32-pinctrl";
181 #address-cells = <1>;
182 #size-cells = <1>;
186 compatible = "st,stm32-gpio";
187 gpio-controller;
188 #gpio-cells = <2>;
194 compatible = "st,stm32-gpio";
195 gpio-controller;
196 #gpio-cells = <2>;
202 compatible = "st,stm32-gpio";
203 gpio-controller;
204 #gpio-cells = <2>;
210 compatible = "st,stm32-gpio";
211 gpio-controller;
212 #gpio-cells = <2>;
218 compatible = "st,stm32-gpio";
219 gpio-controller;
220 #gpio-cells = <2>;
226 compatible = "st,stm32-gpio";
227 gpio-controller;
228 #gpio-cells = <2>;
234 compatible = "st,stm32-gpio";
235 gpio-controller;
236 #gpio-cells = <2>;
242 compatible = "st,stm32-gpio";
243 gpio-controller;
244 #gpio-cells = <2>;
251 compatible = "st,stm32-watchdog";
257 compatible = "st,stm32-window-watchdog";
265 compatible = "st,stm32-usart", "st,stm32-uart";
274 compatible = "st,stm32-usart", "st,stm32-uart";
283 compatible = "st,stm32-usart", "st,stm32-uart";
292 compatible = "st,stm32-uart";
301 compatible = "st,stm32-uart";
310 compatible = "st,stm32-lpuart", "st,stm32-uart";
319 compatible = "st,stm32-lptim";
321 #address-cells = <1>;
322 #size-cells = <0>;
325 interrupt-names = "wakeup";
329 dma1: dma@40020000 {
330 compatible = "st,stm32-dma-v2";
331 #dma-cells = <3>;
335 dma-requests = <8>;
336 dma-offset = <0>;
340 dma2: dma@40020400 {
341 compatible = "st,stm32-dma-v2";
342 #dma-cells = <3>;
346 dma-requests = <8>;
347 dma-offset = <8>;
352 compatible = "st,stm32-dmamux";
353 #dma-cells = <3>;
357 dma-channels = <16>;
358 dma-generators = <4>;
359 dma-requests= <90>;
364 compatible = "st,stm32-i2c-v2";
365 clock-frequency = <I2C_BITRATE_STANDARD>;
366 #address-cells = <1>;
367 #size-cells = <0>;
371 interrupt-names = "event", "error";
376 compatible = "st,stm32-i2c-v2";
377 #address-cells = <1>;
378 #size-cells = <0>;
379 clock-frequency = <I2C_BITRATE_STANDARD>;
383 interrupt-names = "event", "error";
388 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
389 #address-cells = <1>;
390 #size-cells = <0>;
398 compatible = "st,stm32-sdmmc";
408 compatible = "st,stm32-dac";
412 #io-channel-cells = <1>;
416 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
417 #address-cells = <1>;
418 #size-cells = <0>;
426 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
427 #address-cells = <1>;
428 #size-cells = <0>;
436 compatible = "st,stm32-ospi";
439 clock-names = "ospix", "ospi-ker";
442 #address-cells = <1>;
443 #size-cells = <0>;
448 compatible = "st,stm32-rng";
452 nist-config = <0xf00d00>;
453 health-test-magic = <0x17590abc>;
454 health-test-config = <0xa2b3>;
459 compatible = "st,stm32-rtc";
464 alarms-count = <2>;
465 alrm-exti-line = <17>;
470 compatible = "st,stm32-timers";
475 interrupt-names = "brk", "up", "trgcom", "cc";
480 compatible = "st,stm32-pwm";
482 #pwm-cells = <3>;
487 compatible = "st,stm32-timers";
492 interrupt-names = "global";
497 compatible = "st,stm32-pwm";
499 #pwm-cells = <3>;
503 compatible = "st,stm32-counter";
509 compatible = "st,stm32-timers";
514 interrupt-names = "global";
519 compatible = "st,stm32-pwm";
521 #pwm-cells = <3>;
525 compatible = "st,stm32-counter";
531 compatible = "st,stm32-timers";
536 interrupt-names = "global";
541 compatible = "st,stm32-pwm";
543 #pwm-cells = <3>;
547 compatible = "st,stm32-counter";
553 compatible = "st,stm32-timers";
558 interrupt-names = "global";
563 compatible = "st,stm32-pwm";
565 #pwm-cells = <3>;
569 compatible = "st,stm32-counter";
575 compatible = "st,stm32-timers";
580 interrupt-names = "brk", "up", "trgcom", "cc";
585 compatible = "st,stm32-pwm";
587 #pwm-cells = <3>;
592 compatible = "st,stm32-timers";
597 interrupt-names = "global";
602 compatible = "st,stm32-pwm";
604 #pwm-cells = <3>;
608 compatible = "st,stm32-counter";
614 compatible = "st,stm32-timers";
619 interrupt-names = "global";
624 compatible = "st,stm32-pwm";
626 #pwm-cells = <3>;
630 compatible = "st,stm32-counter";
636 compatible = "st,stm32-timers";
641 interrupt-names = "global";
646 compatible = "st,stm32-pwm";
648 #pwm-cells = <3>;
652 compatible = "st,stm32-counter";
658 compatible = "st,stm32-adc";
663 #io-channel-cells = <1>;
668 sampling-times = <3 7 13 25 48 93 248 641>;
669 st,adc-sequencer = "FULLY_CONFIGURABLE";
670 st,adc-oversampler = "OVERSAMPLER_MINIMAL";
674 compatible = "st,stm32-adc";
679 #io-channel-cells = <1>;
684 sampling-times = <3 7 13 25 48 93 248 641>;
685 st,adc-sequencer = "FULLY_CONFIGURABLE";
686 st,adc-oversampler = "OVERSAMPLER_MINIMAL";
690 compatible = "st,stm32-usb";
693 interrupt-names = "usb";
694 num-bidir-endpoints = <8>;
695 ram-size = <1024>;
703 compatible = "st,stm32-ucpd";
711 compatible = "st,stm32-fmc";
719 compatible = "st,stm32-temp-cal";
720 ts-cal1-addr = <0x0BFA05A8>;
721 ts-cal2-addr = <0x0BFA05CA>;
722 ts-cal1-temp = <30>;
723 ts-cal2-temp = <130>;
724 ts-cal-vrefanalog = <3000>;
725 io-channels = <&adc1 17>;
730 compatible = "st,stm32-vref";
731 vrefint-cal-addr = <0x0BFA05AA>;
732 vrefint-cal-mv = <3000>;
733 io-channels = <&adc1 0>;
738 compatible = "st,stm32-vbat";
740 io-channels = <&adc1 18>;
745 compatible = "usb-nop-xceiv";
746 #phy-cells = <0>;
750 compatible = "st,stm32-smbus";
751 #address-cells = <1>;
752 #size-cells = <0>;
758 compatible = "st,stm32-smbus";
759 #address-cells = <1>;
760 #size-cells = <0>;
768 arm,num-irq-priority-bits = <3>;