Lines Matching +full:stm32 +full:- +full:rcc
4 * SPDX-License-Identifier: Apache-2.0
12 clk_hsi48: clk-hsi48 {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <DT_FREQ_M(48)>;
21 compatible = "st,stm32l451", "st,stm32l4", "simple-bus";
23 pinctrl: pin-controller@48000000 {
25 compatible = "st,stm32-gpio";
26 gpio-controller;
27 #gpio-cells = <2>;
29 clocks = <&rcc STM32_CLOCK(AHB2, 3U)>;
33 compatible = "st,stm32-gpio";
34 gpio-controller;
35 #gpio-cells = <2>;
37 clocks = <&rcc STM32_CLOCK(AHB2, 4U)>;
42 clocks = <&rcc STM32_CLOCK(AHB2, 18U)>,
43 <&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
47 compatible = "st,stm32-i2c-v2";
48 clock-frequency = <I2C_BITRATE_STANDARD>;
49 #address-cells = <1>;
50 #size-cells = <0>;
52 clocks = <&rcc STM32_CLOCK(APB1, 22U)>;
54 interrupt-names = "event", "error";
59 compatible = "st,stm32-i2c-v2";
60 clock-frequency = <I2C_BITRATE_STANDARD>;
61 #address-cells = <1>;
62 #size-cells = <0>;
64 clocks = <&rcc STM32_CLOCK(APB1_2, 1U)>;
66 interrupt-names = "event", "error";
71 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
72 #address-cells = <1>;
73 #size-cells = <0>;
75 clocks = <&rcc STM32_CLOCK(APB1, 14U)>;
81 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
82 #address-cells = <1>;
83 #size-cells = <0>;
85 clocks = <&rcc STM32_CLOCK(APB1, 15U)>;
91 compatible = "st,stm32-usart", "st,stm32-uart";
93 clocks = <&rcc STM32_CLOCK(APB1, 18U)>;
100 compatible = "st,stm32-uart";
102 clocks = <&rcc STM32_CLOCK(APB1, 19U)>;
109 compatible = "st,stm32-timers";
111 clocks = <&rcc STM32_CLOCK(APB1, 1U)>;
114 interrupt-names = "global";
119 compatible = "st,stm32-pwm";
121 #pwm-cells = <3>;
125 compatible = "st,stm32-counter";
131 compatible = "st,stm32-dac";
133 clocks = <&rcc STM32_CLOCK(APB1, 29U)>;
135 #io-channel-cells = <1>;
139 compatible = "st,stm32-bxcan";
142 interrupt-names = "TX", "RX0", "RX1", "SCE";
143 clocks = <&rcc STM32_CLOCK(APB1, 25U)>; //RCC_APB1ENR1_CAN1EN
148 compatible = "st,stm32-sdmmc";
150 clocks = <&rcc STM32_CLOCK(APB2, 10U)>,
151 <&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
159 compatible = "st,stm32-bbram";
160 st,backup-regs = <32>;
167 compatible = "st,stm32-smbus";
168 #address-cells = <1>;
169 #size-cells = <0>;
175 compatible = "st,stm32-smbus";
176 #address-cells = <1>;
177 #size-cells = <0>;