Lines Matching +full:stm32 +full:- +full:rcc
4 * SPDX-License-Identifier: Apache-2.0
12 clk_hsi48: clk-hsi48 {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <DT_FREQ_M(48)>;
21 compatible = "st,stm32l431", "st,stm32l4", "simple-bus";
23 pinctrl: pin-controller@48000000 {
26 compatible = "st,stm32-gpio";
28 clocks = <&rcc STM32_CLOCK(AHB2, 3U)>;
29 gpio-controller;
30 #gpio-cells = <2>;
34 compatible = "st,stm32-gpio";
36 clocks = <&rcc STM32_CLOCK(AHB2, 4U)>;
37 gpio-controller;
38 #gpio-cells = <2>;
44 clocks = <&rcc STM32_CLOCK(AHB2, 18U)>,
45 <&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
49 compatible = "st,stm32-i2c-v2";
50 #address-cells = <1>;
51 #size-cells = <0>;
53 clocks = <&rcc STM32_CLOCK(APB1, 22U)>;
54 clock-frequency = <I2C_BITRATE_STANDARD>;
56 interrupt-names = "event", "error";
61 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
62 #address-cells = <1>;
63 #size-cells = <0>;
65 clocks = <&rcc STM32_CLOCK(APB1, 14U)>;
71 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
72 #address-cells = <1>;
73 #size-cells = <0>;
75 clocks = <&rcc STM32_CLOCK(APB1, 15U)>;
81 compatible = "st,stm32-usart", "st,stm32-uart";
83 clocks = <&rcc STM32_CLOCK(APB1, 18U)>;
90 compatible = "st,stm32-timers";
92 clocks = <&rcc STM32_CLOCK(APB1, 5U)>;
95 interrupt-names = "global";
100 compatible = "st,stm32-counter";
106 compatible = "st,stm32-bxcan";
108 clocks = <&rcc STM32_CLOCK(APB1, 25U)>;
110 interrupt-names = "TX", "RX0", "RX1", "SCE";
115 compatible = "st,stm32-sdmmc";
117 clocks = <&rcc STM32_CLOCK(APB2, 10U)>,
118 <&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
125 compatible = "st,stm32-dac";
127 clocks = <&rcc STM32_CLOCK(APB1, 29U)>;
128 #io-channel-cells = <1>;
134 compatible = "st,stm32-smbus";
135 #address-cells = <1>;
136 #size-cells = <0>;