Lines Matching +full:stm32 +full:- +full:window +full:- +full:watchdog
7 * SPDX-License-Identifier: Apache-2.0
10 #include <arm/armv7-m.dtsi>
11 #include <zephyr/dt-bindings/adc/adc.h>
12 #include <zephyr/dt-bindings/clock/stm32f4_clock.h>
13 #include <zephyr/dt-bindings/i2c/i2c.h>
14 #include <zephyr/dt-bindings/gpio/gpio.h>
15 #include <zephyr/dt-bindings/pwm/pwm.h>
16 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
17 #include <zephyr/dt-bindings/dma/stm32_dma.h>
18 #include <zephyr/dt-bindings/adc/stm32f4_adc.h>
19 #include <zephyr/dt-bindings/reset/stm32f2_4_7_reset.h>
20 #include <zephyr/dt-bindings/sensor/qdec_stm32.h>
25 zephyr,flash-controller = &flash;
26 zephyr,cortex-m-idle-timer = &rtc;
30 #address-cells = <1>;
31 #size-cells = <0>;
35 compatible = "arm,cortex-m4f";
37 cpu-power-states = <&stop>;
40 power-states {
42 compatible = "zephyr,power-state";
43 power-state-name = "suspend-to-idle";
50 min-residency-us = <400>;
51 exit-latency-us = <300>;
57 compatible = "mmio-sram";
61 clk_hse: clk-hse {
62 #clock-cells = <0>;
63 compatible = "st,stm32-hse-clock";
67 clk_hsi: clk-hsi {
68 #clock-cells = <0>;
69 compatible = "fixed-clock";
70 clock-frequency = <DT_FREQ_M(16)>;
74 clk_lse: clk-lse {
75 #clock-cells = <0>;
76 compatible = "fixed-clock";
77 clock-frequency = <32768>;
81 clk_lsi: clk-lsi {
82 #clock-cells = <0>;
83 compatible = "fixed-clock";
84 clock-frequency = <DT_FREQ_K(32)>;
89 #clock-cells = <0>;
90 compatible = "st,stm32f4-pll-clock";
97 compatible = "st,stm32-clock-mco";
102 compatible = "st,stm32-clock-mco";
108 flash: flash-controller@40023c00 {
109 compatible = "st,stm32-flash-controller", "st,stm32f4-flash-controller";
113 #address-cells = <1>;
114 #size-cells = <1>;
117 compatible = "st,stm32f4-nv-flash", "st,stm32-nv-flash",
118 "soc-nv-flash";
120 write-block-size = <1>;
122 max-erase-time = <4000>;
127 compatible = "st,stm32-rcc";
128 #clock-cells = <2>;
131 rctl: reset-controller {
132 compatible = "st,stm32-rcc-rctl";
133 #reset-cells = <1>;
137 exti: interrupt-controller@40013c00 {
138 compatible = "st,stm32-exti";
139 interrupt-controller;
140 #interrupt-cells = <1>;
141 #address-cells = <1>;
143 num-lines = <16>;
146 interrupt-names = "line0", "line1", "line2", "line3",
147 "line4", "line5-9", "line10-15";
148 line-ranges = <0 1>, <1 1>, <2 1>, <3 1>,
152 pinctrl: pin-controller@40020000 {
153 compatible = "st,stm32-pinctrl";
154 #address-cells = <1>;
155 #size-cells = <1>;
159 compatible = "st,stm32-gpio";
160 gpio-controller;
161 #gpio-cells = <2>;
167 compatible = "st,stm32-gpio";
168 gpio-controller;
169 #gpio-cells = <2>;
175 compatible = "st,stm32-gpio";
176 gpio-controller;
177 #gpio-cells = <2>;
183 compatible = "st,stm32-gpio";
184 gpio-controller;
185 #gpio-cells = <2>;
191 compatible = "st,stm32-gpio";
192 gpio-controller;
193 #gpio-cells = <2>;
199 compatible = "st,stm32-gpio";
200 gpio-controller;
201 #gpio-cells = <2>;
207 compatible = "st,stm32-gpio";
208 gpio-controller;
209 #gpio-cells = <2>;
215 compatible = "st,stm32-gpio";
216 gpio-controller;
217 #gpio-cells = <2>;
223 iwdg: watchdog@40003000 {
224 compatible = "st,stm32-watchdog";
229 wwdg: watchdog@40002c00 {
230 compatible = "st,stm32-window-watchdog";
238 compatible = "st,stm32-usart", "st,stm32-uart";
247 compatible = "st,stm32-usart", "st,stm32-uart";
256 compatible = "st,stm32-usart", "st,stm32-uart";
265 compatible = "st,stm32-i2c-v1";
266 clock-frequency = <I2C_BITRATE_STANDARD>;
267 #address-cells = <1>;
268 #size-cells = <0>;
272 interrupt-names = "event", "error";
277 compatible = "st,stm32-i2c-v1";
278 clock-frequency = <I2C_BITRATE_STANDARD>;
279 #address-cells = <1>;
280 #size-cells = <0>;
284 interrupt-names = "event", "error";
289 compatible = "st,stm32-i2c-v1";
290 clock-frequency = <I2C_BITRATE_STANDARD>;
291 #address-cells = <1>;
292 #size-cells = <0>;
296 interrupt-names = "event", "error";
301 compatible = "st,stm32-spi";
302 #address-cells = <1>;
303 #size-cells = <0>;
311 compatible = "st,stm32-otgfs";
314 interrupt-names = "otgfs";
315 num-bidir-endpoints = <4>;
316 ram-size = <1280>;
317 maximum-speed = "full-speed";
325 compatible = "st,stm32-timers";
330 interrupt-names = "brk", "up", "trgcom", "cc";
335 compatible = "st,stm32-pwm";
337 #pwm-cells = <3>;
341 compatible = "st,stm32-qdec";
343 st,input-filter-level = <NO_FILTER>;
348 compatible = "st,stm32-timers";
353 interrupt-names = "global";
358 compatible = "st,stm32-pwm";
360 #pwm-cells = <3>;
364 compatible = "st,stm32-counter";
369 compatible = "st,stm32-qdec";
371 st,input-filter-level = <NO_FILTER>;
376 compatible = "st,stm32-timers";
381 interrupt-names = "global";
386 compatible = "st,stm32-pwm";
388 #pwm-cells = <3>;
392 compatible = "st,stm32-counter";
397 compatible = "st,stm32-qdec";
399 st,input-filter-level = <NO_FILTER>;
404 compatible = "st,stm32-timers";
409 interrupt-names = "global";
414 compatible = "st,stm32-pwm";
416 #pwm-cells = <3>;
420 compatible = "st,stm32-counter";
425 compatible = "st,stm32-qdec";
427 st,input-filter-level = <NO_FILTER>;
432 compatible = "st,stm32-timers";
437 interrupt-names = "global";
442 compatible = "st,stm32-pwm";
444 #pwm-cells = <3>;
448 compatible = "st,stm32-counter";
453 compatible = "st,stm32-qdec";
455 st,input-filter-level = <NO_FILTER>;
460 compatible = "st,stm32-timers";
465 interrupt-names = "global";
470 compatible = "st,stm32-pwm";
472 #pwm-cells = <3>;
476 compatible = "st,stm32-counter";
482 compatible = "st,stm32-timers";
487 interrupt-names = "global";
492 compatible = "st,stm32-pwm";
494 #pwm-cells = <3>;
498 compatible = "st,stm32-counter";
504 compatible = "st,stm32-timers";
509 interrupt-names = "global";
514 compatible = "st,stm32-pwm";
516 #pwm-cells = <3>;
520 compatible = "st,stm32-counter";
526 compatible = "st,stm32-rtc";
531 alarms-count = <2>;
532 alrm-exti-line = <17>;
536 compatible = "st,stm32-bbram";
537 st,backup-regs = <20>;
543 compatible = "st,stm32f4-adc", "st,stm32-adc";
548 #io-channel-cells = <1>;
553 sampling-times = <3 15 28 56 84 112 144 480>;
554 st,adc-clock-source = "SYNC";
555 st,adc-sequencer = "FULLY_CONFIGURABLE";
556 st,adc-oversampler = "OVERSAMPLER_NONE";
560 compatible = "st,stm32-dma-v1";
561 #dma-cells = <4>;
569 compatible = "st,stm32-dma-v1";
570 #dma-cells = <4>;
579 compatible = "st,stm32-sdmmc";
590 compatible = "st,stm32-temp-cal";
591 ts-cal1-addr = <0x1FFF7A2C>;
592 ts-cal2-addr = <0x1FFF7A2E>;
593 ts-cal1-temp = <30>;
594 ts-cal2-temp = <110>;
595 ts-cal-vrefanalog = <3300>;
596 io-channels = <&adc1 16>;
601 compatible = "st,stm32-vref";
602 vrefint-cal-addr = <0x1FFF7A2A>;
603 vrefint-cal-mv = <3300>;
604 io-channels = <&adc1 17>;
609 compatible = "st,stm32-vbat";
611 io-channels = <&adc1 18>;
616 compatible = "usb-nop-xceiv";
617 #phy-cells = <0>;
621 compatible = "st,stm32-smbus";
622 #address-cells = <1>;
623 #size-cells = <0>;
629 compatible = "st,stm32-smbus";
630 #address-cells = <1>;
631 #size-cells = <0>;
637 compatible = "st,stm32-smbus";
638 #address-cells = <1>;
639 #size-cells = <0>;
646 arm,num-irq-priority-bits = <4>;