Lines Matching +full:counter +full:- +full:size
2 * Copyright (c) 2017 I-SENSE group of ICCS
6 * SPDX-License-Identifier: Apache-2.0
9 #include <arm/armv7-m.dtsi>
10 #include <zephyr/dt-bindings/clock/stm32f3_clock.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
15 #include <zephyr/dt-bindings/dma/stm32_dma.h>
16 #include <zephyr/dt-bindings/reset/stm32f0_1_3_reset.h>
17 #include <zephyr/dt-bindings/adc/adc.h>
22 zephyr,flash-controller = &flash;
26 #address-cells = <1>;
27 #size-cells = <0>;
31 compatible = "arm,cortex-m4f";
37 compatible = "mmio-sram";
42 clk_hse: clk-hse {
43 #clock-cells = <0>;
44 compatible = "st,stm32-hse-clock";
48 clk_hsi: clk-hsi {
49 #clock-cells = <0>;
50 compatible = "fixed-clock";
51 clock-frequency = <DT_FREQ_M(8)>;
55 clk_lse: clk-lse {
56 #clock-cells = <0>;
57 compatible = "st,stm32-lse-clock";
58 clock-frequency = <32768>;
59 driving-capability = <0>;
63 clk_lsi: clk-lsi {
64 #clock-cells = <0>;
65 compatible = "fixed-clock";
66 clock-frequency = <DT_FREQ_K(40)>;
71 #clock-cells = <0>;
72 compatible = "st,stm32f0-pll-clock";
78 flash: flash-controller@40022000 {
79 compatible = "st,stm32-flash-controller", "st,stm32f1-flash-controller";
84 #address-cells = <1>;
85 #size-cells = <1>;
88 compatible = "st,stm32-nv-flash", "soc-nv-flash";
90 write-block-size = <2>;
91 erase-block-size = <2048>;
93 max-erase-time = <40>;
98 compatible = "st,stm32f3-rcc";
99 #clock-cells = <2>;
102 rctl: reset-controller {
103 compatible = "st,stm32-rcc-rctl";
104 #reset-cells = <1>;
108 exti: interrupt-controller@40010400 {
109 compatible = "st,stm32-exti";
110 interrupt-controller;
111 #interrupt-cells = <1>;
112 #address-cells = <1>;
114 num-lines = <16>;
117 interrupt-names = "line0", "line1", "line2", "line3",
118 "line4", "line5-9", "line10-15";
119 line-ranges = <0 1>, <1 1>, <2 1>, <3 1>,
123 pinctrl: pin-controller@48000000 {
124 compatible = "st,stm32-pinctrl";
125 #address-cells = <1>;
126 #size-cells = <1>;
130 compatible = "st,stm32-gpio";
131 gpio-controller;
132 #gpio-cells = <2>;
138 compatible = "st,stm32-gpio";
139 gpio-controller;
140 #gpio-cells = <2>;
146 compatible = "st,stm32-gpio";
147 gpio-controller;
148 #gpio-cells = <2>;
154 compatible = "st,stm32-gpio";
155 gpio-controller;
156 #gpio-cells = <2>;
162 compatible = "st,stm32-gpio";
163 gpio-controller;
164 #gpio-cells = <2>;
171 compatible = "st,stm32-watchdog";
177 compatible = "st,stm32-window-watchdog";
185 compatible = "st,stm32-usart", "st,stm32-uart";
194 compatible = "st,stm32-usart", "st,stm32-uart";
203 compatible = "st,stm32-usart", "st,stm32-uart";
212 compatible = "st,stm32-uart";
221 compatible = "st,stm32-i2c-v2";
222 clock-frequency = <I2C_BITRATE_STANDARD>;
223 #address-cells = <1>;
224 #size-cells = <0>;
232 interrupt-names = "event", "error";
237 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
238 #address-cells = <1>;
239 #size-cells = <0>;
247 compatible = "st,stm32-dac";
251 #io-channel-cells = <1>;
255 compatible = "st,stm32-usb";
258 interrupt-names = "usb";
259 num-bidir-endpoints = <8>;
260 ram-size = <512>;
267 compatible = "st,stm32-timers";
272 interrupt-names = "global";
277 compatible = "st,stm32-pwm";
279 #pwm-cells = <3>;
282 counter {
283 compatible = "st,stm32-counter";
289 compatible = "st,stm32-timers";
294 interrupt-names = "global";
299 compatible = "st,stm32-pwm";
301 #pwm-cells = <3>;
304 counter {
305 compatible = "st,stm32-counter";
311 compatible = "st,stm32-timers";
316 interrupt-names = "global";
320 counter {
321 compatible = "st,stm32-counter";
327 compatible = "st,stm32-timers";
332 interrupt-names = "global";
336 counter {
337 compatible = "st,stm32-counter";
343 compatible = "st,stm32-timers";
348 interrupt-names = "global";
353 compatible = "st,stm32-pwm";
355 #pwm-cells = <3>;
358 counter {
359 compatible = "st,stm32-counter";
365 compatible = "st,stm32-timers";
370 interrupt-names = "global";
375 compatible = "st,stm32-pwm";
377 #pwm-cells = <3>;
380 counter {
381 compatible = "st,stm32-counter";
387 compatible = "st,stm32-timers";
392 interrupt-names = "global";
397 compatible = "st,stm32-pwm";
399 #pwm-cells = <3>;
402 counter {
403 compatible = "st,stm32-counter";
409 compatible = "st,stm32-rtc";
414 alarms-count = <2>;
415 alrm-exti-line = <17>;
420 compatible = "st,stm32-bxcan";
423 interrupt-names = "TX", "RX0", "RX1", "SCE";
429 compatible = "st,stm32-dma-v2bis";
430 #dma-cells = <2>;
439 compatible = "st,stm32-temp-cal";
440 ts-cal1-addr = <0x1FFFF7B8>;
441 ts-cal2-addr = <0x1FFFF7C2>;
442 ts-cal1-temp = <30>;
443 ts-cal2-temp = <110>;
444 ts-cal-vrefanalog = <3300>;
445 io-channels = <&adc1 16>;
450 compatible = "st,stm32-vref";
451 vrefint-cal-addr = <0x1FFFF7BA>;
452 vrefint-cal-mv = <3300>;
453 io-channels = <&adc1 18>;
458 compatible = "st,stm32-vbat";
460 io-channels = <&adc1 17>;
465 compatible = "usb-nop-xceiv";
466 #phy-cells = <0>;
470 compatible = "st,stm32-smbus";
471 #address-cells = <1>;
472 #size-cells = <0>;
479 arm,num-irq-priority-bits = <4>;