Lines Matching refs:U
132 clocks = <&rcc STM32_CLOCK(AHB1, 0U)>;
140 clocks = <&rcc STM32_CLOCK(AHB1, 1U)>;
148 clocks = <&rcc STM32_CLOCK(AHB1, 2U)>;
156 clocks = <&rcc STM32_CLOCK(AHB1, 3U)>;
164 clocks = <&rcc STM32_CLOCK(AHB1, 4U)>;
172 clocks = <&rcc STM32_CLOCK(AHB1, 5U)>;
180 clocks = <&rcc STM32_CLOCK(AHB1, 6U)>;
188 clocks = <&rcc STM32_CLOCK(AHB1, 7U)>;
196 clocks = <&rcc STM32_CLOCK(AHB1, 8U)>;
203 clocks = <&rcc STM32_CLOCK(APB1, 28U)>;
226 clocks = <&rcc STM32_CLOCK(APB1, 11U)>;
234 clocks = <&rcc STM32_CLOCK(APB2, 4U)>;
235 resets = <&rctl STM32_RESET(APB2, 4U)>;
243 clocks = <&rcc STM32_CLOCK(APB1, 17U)>;
244 resets = <&rctl STM32_RESET(APB1, 17U)>;
252 clocks = <&rcc STM32_CLOCK(APB1, 18U)>;
253 resets = <&rctl STM32_RESET(APB1, 18U)>;
261 clocks = <&rcc STM32_CLOCK(APB2, 5U)>;
262 resets = <&rctl STM32_RESET(APB2, 5U)>;
270 clocks = <&rcc STM32_CLOCK(APB1, 19U)>;
271 resets = <&rctl STM32_RESET(APB1, 19U)>;
279 clocks = <&rcc STM32_CLOCK(APB1, 20U)>;
280 resets = <&rctl STM32_RESET(APB1, 20U)>;
290 clocks = <&rcc STM32_CLOCK(APB2, 12U)>;
300 clocks = <&rcc STM32_CLOCK(APB1, 14U)>;
310 clocks = <&rcc STM32_CLOCK(APB1, 15U)>;
321 clocks = <&rcc STM32_CLOCK(APB1, 21U)>;
333 clocks = <&rcc STM32_CLOCK(APB1, 22U)>;
345 clocks = <&rcc STM32_CLOCK(APB1, 23U)>;
359 clocks = <&rcc STM32_CLOCK(AHB2, 7U)>,
368 clocks = <&rcc STM32_CLOCK(APB2, 8U)>;
387 clocks = <&rcc STM32_CLOCK(AHB1, 21U)>;
396 clocks = <&rcc STM32_CLOCK(AHB1, 22U)>;
404 clocks = <&rcc STM32_CLOCK(APB1, 29U)>;
412 clocks = <&rcc STM32_CLOCK(APB2, 0U)>;
413 resets = <&rctl STM32_RESET(APB2, 0U)>;
429 clocks = <&rcc STM32_CLOCK(APB1, 0U)>;
430 resets = <&rctl STM32_RESET(APB1, 0U)>;
446 clocks = <&rcc STM32_CLOCK(APB1, 1U)>;
447 resets = <&rctl STM32_RESET(APB1, 1U)>;
468 clocks = <&rcc STM32_CLOCK(APB1, 2U)>;
469 resets = <&rctl STM32_RESET(APB1, 2U)>;
490 clocks = <&rcc STM32_CLOCK(APB1, 3U)>;
491 resets = <&rctl STM32_RESET(APB1, 3U)>;
512 clocks = <&rcc STM32_CLOCK(APB1, 4U)>;
513 resets = <&rctl STM32_RESET(APB1, 4U)>;
528 clocks = <&rcc STM32_CLOCK(APB1, 5U)>;
529 resets = <&rctl STM32_RESET(APB1, 5U)>;
544 clocks = <&rcc STM32_CLOCK(APB2, 1U)>;
545 resets = <&rctl STM32_RESET(APB2, 1U)>;
561 clocks = <&rcc STM32_CLOCK(APB2, 16U)>;
562 resets = <&rctl STM32_RESET(APB2, 16U)>;
583 clocks = <&rcc STM32_CLOCK(APB2, 17U)>;
584 resets = <&rctl STM32_RESET(APB2, 17U)>;
605 clocks = <&rcc STM32_CLOCK(APB2, 18U)>;
606 resets = <&rctl STM32_RESET(APB2, 18U)>;
627 clocks = <&rcc STM32_CLOCK(APB1, 6U)>;
628 resets = <&rctl STM32_RESET(APB1, 6U)>;
649 clocks = <&rcc STM32_CLOCK(APB1, 7U)>;
650 resets = <&rctl STM32_RESET(APB1, 7U)>;
671 clocks = <&rcc STM32_CLOCK(APB1, 8U)>;
672 resets = <&rctl STM32_RESET(APB1, 8U)>;
694 clocks = <&rcc STM32_CLOCK(AHB2, 6U)>;
701 clocks = <&rcc STM32_CLOCK(AHB1, 18U)>;