Lines Matching +full:stm32f1 +full:- +full:pinctrl
5 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/clock/stm32f1_clock.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
13 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
14 #include <zephyr/dt-bindings/dma/stm32_dma.h>
15 #include <zephyr/dt-bindings/adc/stm32f1_adc.h>
16 #include <zephyr/dt-bindings/reset/stm32f0_1_3_reset.h>
17 #include <zephyr/dt-bindings/adc/adc.h>
22 zephyr,flash-controller = &flash;
26 #address-cells = <1>;
27 #size-cells = <0>;
31 compatible = "arm,cortex-m3";
37 compatible = "mmio-sram";
41 clk_hse: clk-hse {
42 #clock-cells = <0>;
43 compatible = "st,stm32-hse-clock";
47 clk_hsi: clk-hsi {
48 #clock-cells = <0>;
49 compatible = "fixed-clock";
50 clock-frequency = <DT_FREQ_M(8)>;
54 clk_lse: clk-lse {
55 #clock-cells = <0>;
56 compatible = "fixed-clock";
57 clock-frequency = <32768>;
61 clk_lsi: clk-lsi {
62 #clock-cells = <0>;
63 compatible = "fixed-clock";
64 clock-frequency = <DT_FREQ_K(40)>;
69 #clock-cells = <0>;
70 compatible = "st,stm32f1-pll-clock";
77 compatible = "st,stm32f1-clock-mco";
84 flash: flash-controller@40022000 {
85 compatible = "st,stm32-flash-controller", "st,stm32f1-flash-controller";
90 #address-cells = <1>;
91 #size-cells = <1>;
94 compatible = "st,stm32-nv-flash", "soc-nv-flash";
96 write-block-size = <2>;
98 max-erase-time = <40>;
103 compatible = "st,stm32f1-rcc";
104 #clock-cells = <2>;
107 rctl: reset-controller {
108 compatible = "st,stm32-rcc-rctl";
109 #reset-cells = <1>;
113 exti: interrupt-controller@40010400 {
114 compatible = "st,stm32-exti";
115 interrupt-controller;
116 #interrupt-cells = <1>;
117 #address-cells = <1>;
119 num-lines = <16>;
122 interrupt-names = "line0", "line1", "line2", "line3",
123 "line4", "line5-9", "line10-15";
124 line-ranges = <0 1>, <1 1>, <2 1>, <3 1>,
128 pinctrl: pin-controller@40010800 { label
129 compatible = "st,stm32f1-pinctrl";
130 #address-cells = <1>;
131 #size-cells = <1>;
135 compatible = "st,stm32-gpio";
136 gpio-controller;
137 #gpio-cells = <2>;
143 compatible = "st,stm32-gpio";
144 gpio-controller;
145 #gpio-cells = <2>;
151 compatible = "st,stm32-gpio";
152 gpio-controller;
153 #gpio-cells = <2>;
159 compatible = "st,stm32-gpio";
160 gpio-controller;
161 #gpio-cells = <2>;
167 compatible = "st,stm32-gpio";
168 gpio-controller;
169 #gpio-cells = <2>;
176 compatible = "st,stm32-usart", "st,stm32-uart";
185 compatible = "st,stm32-usart", "st,stm32-uart";
194 compatible = "st,stm32-usart", "st,stm32-uart";
203 compatible = "st,stm32-i2c-v1";
204 clock-frequency = <I2C_BITRATE_STANDARD>;
205 #address-cells = <1>;
206 #size-cells = <0>;
210 interrupt-names = "event", "error";
215 compatible = "st,stm32-i2c-v1";
216 clock-frequency = <I2C_BITRATE_STANDARD>;
217 #address-cells = <1>;
218 #size-cells = <0>;
222 interrupt-names = "event", "error";
227 compatible = "st,stm32-spi";
228 #address-cells = <1>;
229 #size-cells = <0>;
237 compatible = "st,stm32-watchdog";
243 compatible = "st,stm32-window-watchdog";
251 compatible = "st,stm32-timers";
256 interrupt-names = "brk", "up", "trgcom", "cc";
261 compatible = "st,stm32-pwm";
263 #pwm-cells = <3>;
268 compatible = "st,stm32-timers";
273 interrupt-names = "global";
278 compatible = "st,stm32-pwm";
280 #pwm-cells = <3>;
284 compatible = "st,stm32-counter";
290 compatible = "st,stm32-timers";
295 interrupt-names = "global";
300 compatible = "st,stm32-pwm";
302 #pwm-cells = <3>;
306 compatible = "st,stm32-counter";
312 compatible = "st,stm32-timers";
317 interrupt-names = "global";
322 compatible = "st,stm32-pwm";
324 #pwm-cells = <3>;
328 compatible = "st,stm32-counter";
334 compatible = "st,stm32-rtc";
343 compatible = "st,stm32f1-adc", "st,stm32-adc";
348 #io-channel-cells = <1>;
350 sampling-times = <2 8 14 29 42 56 72 240>;
351 st,adc-sequencer = "FULLY_CONFIGURABLE";
352 st,adc-oversampler = "OVERSAMPLER_NONE";
356 compatible = "st,stm32-dma-v2bis";
357 #dma-cells = <2>;
366 compatible = "st,stm32-temp";
367 io-channels = <&adc1 16>;
375 compatible = "st,stm32-smbus";
376 #address-cells = <1>;
377 #size-cells = <0>;
383 compatible = "st,stm32-smbus";
384 #address-cells = <1>;
385 #size-cells = <0>;
392 arm,num-irq-priority-bits = <4>;