Lines Matching +full:pll +full:- +full:clock +full:- +full:names
4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/clock/ra_clock.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
15 xtal: clock-main-osc {
16 compatible = "renesas,ra-cgc-external-clock";
17 clock-frequency = <DT_FREQ_M(24)>;
18 #clock-cells = <0>;
22 hoco: clock-hoco {
23 compatible = "fixed-clock";
24 clock-frequency = <DT_FREQ_M(48)>;
25 #clock-cells = <0>;
28 moco: clock-moco {
29 compatible = "fixed-clock";
30 clock-frequency = <DT_FREQ_M(8)>;
31 #clock-cells = <0>;
34 loco: clock-loco {
35 compatible = "fixed-clock";
36 clock-frequency = <32768>;
37 #clock-cells = <0>;
40 subclk: clock-subclk {
41 compatible = "renesas,ra-cgc-subclk";
42 clock-frequency = <32768>;
43 #clock-cells = <0>;
47 pll: pll { label
48 compatible = "renesas,ra-cgc-pll";
49 #clock-cells = <0>;
55 compatible = "renesas,ra-cgc-pll-out";
59 #clock-cells = <0>;
63 compatible = "renesas,ra-cgc-pll-out";
67 #clock-cells = <0>;
71 compatible = "renesas,ra-cgc-pll-out";
75 #clock-cells = <0>;
81 compatible = "renesas,ra-cgc-pll";
82 #clock-cells = <0>;
88 compatible = "renesas,ra-cgc-pll-out";
92 #clock-cells = <0>;
96 compatible = "renesas,ra-cgc-pll-out";
100 #clock-cells = <0>;
104 compatible = "renesas,ra-cgc-pll-out";
108 #clock-cells = <0>;
114 compatible = "renesas,ra-cgc-pclk-block";
117 reg-names = "MSTPA", "MSTPB","MSTPC",
119 #clock-cells = <0>;
124 compatible = "renesas,ra-cgc-pclk";
126 #clock-cells = <2>;
131 compatible = "renesas,ra-cgc-pclk";
133 #clock-cells = <2>;
138 compatible = "renesas,ra-cgc-pclk";
140 #clock-cells = <2>;
145 compatible = "renesas,ra-cgc-pclk";
147 #clock-cells = <2>;
152 compatible = "renesas,ra-cgc-pclk";
154 #clock-cells = <2>;
159 compatible = "renesas,ra-cgc-pclk";
161 #clock-cells = <2>;
166 compatible = "renesas,ra-cgc-pclk";
168 #clock-cells = <2>;
173 compatible = "renesas,ra-cgc-pclk";
176 compatible = "renesas,ra-cgc-busclk";
177 clk-out-div = <2>;
179 #clock-cells = <0>;
181 #clock-cells = <2>;
186 compatible = "renesas,ra-cgc-pclk";
188 #clock-cells = <2>;
193 compatible = "renesas,ra-cgc-pclk";
194 #clock-cells = <2>;
199 compatible = "renesas,ra-cgc-pclk";
200 #clock-cells = <2>;
205 compatible = "renesas,ra-cgc-pclk";
206 #clock-cells = <2>;
211 compatible = "renesas,ra-cgc-pclk";
212 #clock-cells = <2>;
217 compatible = "renesas,ra-cgc-pclk";
218 #clock-cells = <2>;
223 compatible = "renesas,ra-cgc-pclk";
224 #clock-cells = <2>;
229 compatible = "renesas,ra-cgc-pclk";
230 #clock-cells = <2>;
235 compatible = "renesas,ra-cgc-pclk";
236 #clock-cells = <2>;
241 compatible = "renesas,ra-cgc-pclk";
242 #clock-cells = <2>;
250 port-irqs = <&port_irq6 &port_irq7 &port_irq8
253 port-irq-names = "port-irq6",
254 "port-irq7",
255 "port-irq8",
256 "port-irq9",
257 "port-irq10",
258 "port-irq11",
259 "port-irq12",
260 "port-irq13",
261 "port-irq14";
262 port-irq6-pins = <0>;
263 port-irq7-pins = <1>;
264 port-irq8-pins = <2>;
265 port-irq9-pins = <4>;
266 port-irq10-pins = <5>;
267 port-irq11-pins = <6>;
268 port-irq12-pins = <8>;
269 port-irq13-pins = <9 15>;
270 port-irq14-pins = <10>;
274 port-irqs = <&port_irq0 &port_irq1 &port_irq2>;
275 port-irq-names = "port-irq0",
276 "port-irq1",
277 "port-irq2";
278 port-irq0-pins = <5>;
279 port-irq1-pins = <1 4>;
280 port-irq2-pins = <0>;
284 port-irqs = <&port_irq0 &port_irq1 &port_irq2
286 port-irq-names = "port-irq0",
287 "port-irq1",
288 "port-irq2",
289 "port-irq3";
290 port-irq0-pins = <6>;
291 port-irq1-pins = <5>;
292 port-irq2-pins = <3 13>;
293 port-irq3-pins = <2 8 12>;
297 port-irqs = <&port_irq4 &port_irq5 &port_irq6
299 port-irq-names = "port-irq4",
300 "port-irq5",
301 "port-irq6",
302 "port-irq8",
303 "port-irq9";
304 port-irq4-pins = <0>;
305 port-irq5-pins = <2>;
306 port-irq6-pins = <1>;
307 port-irq8-pins = <5>;
308 port-irq9-pins = <4>;
312 port-irqs = <&port_irq0 &port_irq4 &port_irq5
315 port-irq-names = "port-irq0",
316 "port-irq4",
317 "port-irq5",
318 "port-irq6",
319 "port-irq7",
320 "port-irq8",
321 "port-irq9",
322 "port-irq14",
323 "port-irq15";
324 port-irq0-pins = <0>;
325 port-irq4-pins = <2 11>;
326 port-irq5-pins = <1 10>;
327 port-irq6-pins = <9>;
328 port-irq7-pins = <8>;
329 port-irq8-pins = <15>;
330 port-irq9-pins = <14>;
331 port-irq14-pins = <3>;
332 port-irq15-pins = <4>;
336 port-irqs = <&port_irq1 &port_irq2 &port_irq3
338 port-irq-names = "port-irq1",
339 "port-irq2",
340 "port-irq3",
341 "port-irq14",
342 "port-irq15";
343 port-irq1-pins = <8>;
344 port-irq2-pins = <9>;
345 port-irq3-pins = <10>;
346 port-irq14-pins = <12>;
347 port-irq15-pins = <11>;
351 port-irqs = <&port_irq7>;
352 port-irq-names = "port-irq7";
353 port-irq7-pins = <15>;
357 port-irqs = <&port_irq7 &port_irq8 &port_irq10
359 port-irq-names = "port-irq7",
360 "port-irq8",
361 "port-irq10",
362 "port-irq11";
363 port-irq7-pins = <6>;
364 port-irq8-pins = <7>;
365 port-irq10-pins = <9>;
366 port-irq11-pins = <8>;
370 port-irqs = <&port_irq0 &port_irq11 &port_irq12
372 port-irq-names = "port-irq0",
373 "port-irq11",
374 "port-irq12",
375 "port-irq14",
376 "port-irq15";
377 port-irq0-pins = <6>;
378 port-irq11-pins = <0>;
379 port-irq12-pins = <1>;
380 port-irq14-pins = <4>;
381 port-irq15-pins = <8>;
385 port-irqs = <&port_irq8 &port_irq9 &port_irq10
387 port-irq-names = "port-irq8",
388 "port-irq9",
389 "port-irq10",
390 "port-irq11";
391 port-irq8-pins = <5>;
392 port-irq9-pins = <6>;
393 port-irq10-pins = <7>;
394 port-irq11-pins = <8>;
398 port-irqs = <&port_irq4 &port_irq5 &port_irq6>;
399 port-irq-names = "port-irq4",
400 "port-irq5",
401 "port-irq6";
402 port-irq4-pins = <10>;
403 port-irq5-pins = <9>;
404 port-irq6-pins = <8>;