Lines Matching +full:pll +full:- +full:clock +full:- +full:names
4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/clock/ra_clock.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
15 xtal: clock-main-osc {
16 compatible = "renesas,ra-cgc-external-clock";
17 clock-frequency = <DT_FREQ_M(20)>;
18 #clock-cells = <0>;
22 hoco: clock-hoco {
23 compatible = "fixed-clock";
24 clock-frequency = <DT_FREQ_M(48)>;
25 #clock-cells = <0>;
28 moco: clock-moco {
29 compatible = "fixed-clock";
30 clock-frequency = <DT_FREQ_M(8)>;
31 #clock-cells = <0>;
34 loco: clock-loco {
35 compatible = "fixed-clock";
36 clock-frequency = <32768>;
37 #clock-cells = <0>;
40 subclk: clock-subclk {
41 compatible = "renesas,ra-cgc-subclk";
42 clock-frequency = <32768>;
43 #clock-cells = <0>;
47 pll: pll { label
48 compatible = "renesas,ra-cgc-pll";
49 #clock-cells = <0>;
51 /* PLL */
57 compatible = "renesas,ra-cgc-pll-out";
61 #clock-cells = <0>;
65 compatible = "renesas,ra-cgc-pll-out";
69 #clock-cells = <0>;
73 compatible = "renesas,ra-cgc-pll-out";
77 #clock-cells = <0>;
83 compatible = "renesas,ra-cgc-pll";
84 #clock-cells = <0>;
91 compatible = "renesas,ra-cgc-pll-out";
95 #clock-cells = <0>;
99 compatible = "renesas,ra-cgc-pll-out";
103 #clock-cells = <0>;
107 compatible = "renesas,ra-cgc-pll-out";
111 #clock-cells = <0>;
117 compatible = "renesas,ra-cgc-pclk-block";
120 reg-names = "MSTPA", "MSTPB","MSTPC",
122 #clock-cells = <0>;
127 compatible = "renesas,ra-cgc-pclk";
129 #clock-cells = <2>;
134 compatible = "renesas,ra-cgc-pclk";
136 #clock-cells = <2>;
141 compatible = "renesas,ra-cgc-pclk";
143 #clock-cells = <2>;
148 compatible = "renesas,ra-cgc-pclk";
150 #clock-cells = <2>;
155 compatible = "renesas,ra-cgc-pclk";
157 #clock-cells = <2>;
162 compatible = "renesas,ra-cgc-pclk";
164 #clock-cells = <2>;
169 compatible = "renesas,ra-cgc-pclk";
171 #clock-cells = <2>;
176 compatible = "renesas,ra-cgc-pclk";
179 compatible = "renesas,ra-cgc-busclk";
180 clk-out-div = <2>;
182 #clock-cells = <0>;
184 #clock-cells = <2>;
189 compatible = "renesas,ra-cgc-pclk";
191 #clock-cells = <2>;
196 compatible = "renesas,ra-cgc-pclk";
197 #clock-cells = <2>;
202 compatible = "renesas,ra-cgc-pclk";
203 #clock-cells = <2>;
208 compatible = "renesas,ra-cgc-pclk";
209 #clock-cells = <2>;
214 compatible = "renesas,ra-cgc-pclk";
215 #clock-cells = <2>;
220 compatible = "renesas,ra-cgc-pclk";
221 #clock-cells = <2>;
226 compatible = "renesas,ra-cgc-pclk";
227 #clock-cells = <2>;
232 compatible = "renesas,ra-cgc-pclk";
233 #clock-cells = <2>;
238 compatible = "renesas,ra-cgc-pclk";
239 #clock-cells = <2>;
247 compatible = "renesas,ra-usb";
250 interrupt-names = "usbhs-ir", "usbhs-d0", "usbhs-d1";
251 num-bidir-endpoints = <10>;
255 compatible = "renesas,ra-udc";
261 usbhs_phy: usbhs-phy {
262 compatible = "renesas,ra-usbphyc";
263 #phy-cells = <0>;
268 port-irqs = <&port_irq6 &port_irq7 &port_irq8
271 port-irq-names = "port-irq6",
272 "port-irq7",
273 "port-irq8",
274 "port-irq9",
275 "port-irq10",
276 "port-irq11",
277 "port-irq12",
278 "port-irq13",
279 "port-irq14";
280 port-irq6-pins = <0>;
281 port-irq7-pins = <1>;
282 port-irq8-pins = <2>;
283 port-irq9-pins = <4>;
284 port-irq10-pins = <5>;
285 port-irq11-pins = <6>;
286 port-irq12-pins = <8>;
287 port-irq13-pins = <9 15>;
288 port-irq14-pins = <10>;
292 port-irqs = <&port_irq0 &port_irq1 &port_irq2>;
293 port-irq-names = "port-irq0",
294 "port-irq1",
295 "port-irq2";
296 port-irq0-pins = <5>;
297 port-irq1-pins = <1 4>;
298 port-irq2-pins = <0>;
302 port-irqs = <&port_irq0 &port_irq1 &port_irq2
304 port-irq-names = "port-irq0",
305 "port-irq1",
306 "port-irq2",
307 "port-irq3";
308 port-irq0-pins = <6>;
309 port-irq1-pins = <5>;
310 port-irq2-pins = <3 13>;
311 port-irq3-pins = <2 8 12>;
315 port-irqs = <&port_irq4 &port_irq5 &port_irq6
317 port-irq-names = "port-irq4",
318 "port-irq5",
319 "port-irq6",
320 "port-irq8",
321 "port-irq9";
322 port-irq4-pins = <0>;
323 port-irq5-pins = <2>;
324 port-irq6-pins = <1>;
325 port-irq8-pins = <5>;
326 port-irq9-pins = <4>;
330 port-irqs = <&port_irq0 &port_irq4 &port_irq5
333 port-irq-names = "port-irq0",
334 "port-irq4",
335 "port-irq5",
336 "port-irq6",
337 "port-irq7",
338 "port-irq8",
339 "port-irq9",
340 "port-irq14",
341 "port-irq15";
342 port-irq0-pins = <0>;
343 port-irq4-pins = <2 11>;
344 port-irq5-pins = <1 10>;
345 port-irq6-pins = <9>;
346 port-irq7-pins = <8>;
347 port-irq8-pins = <15>;
348 port-irq9-pins = <14>;
349 port-irq14-pins = <3>;
350 port-irq15-pins = <4>;
354 port-irqs = <&port_irq1 &port_irq2 &port_irq3
356 port-irq-names = "port-irq1",
357 "port-irq2",
358 "port-irq3",
359 "port-irq14",
360 "port-irq15";
361 port-irq1-pins = <8>;
362 port-irq2-pins = <9>;
363 port-irq3-pins = <10>;
364 port-irq14-pins = <12>;
365 port-irq15-pins = <11>;
369 port-irqs = <&port_irq7>;
370 port-irq-names = "port-irq7";
371 port-irq7-pins = <15>;
375 port-irqs = <&port_irq7 &port_irq8 &port_irq10
377 port-irq-names = "port-irq7",
378 "port-irq8",
379 "port-irq10",
380 "port-irq11";
381 port-irq7-pins = <6>;
382 port-irq8-pins = <7>;
383 port-irq10-pins = <9>;
384 port-irq11-pins = <8>;
388 port-irqs = <&port_irq0 &port_irq11 &port_irq12
390 port-irq-names = "port-irq0",
391 "port-irq11",
392 "port-irq12",
393 "port-irq14",
394 "port-irq15";
395 port-irq0-pins = <6>;
396 port-irq11-pins = <0>;
397 port-irq12-pins = <1>;
398 port-irq14-pins = <4>;
399 port-irq15-pins = <8>;
403 port-irqs = <&port_irq8 &port_irq9 &port_irq10
405 port-irq-names = "port-irq8",
406 "port-irq9",
407 "port-irq10",
408 "port-irq11";
409 port-irq8-pins = <5>;
410 port-irq9-pins = <6>;
411 port-irq10-pins = <7>;
412 port-irq11-pins = <8>;
416 port-irqs = <&port_irq4 &port_irq5 &port_irq6>;
417 port-irq-names = "port-irq4",
418 "port-irq5",
419 "port-irq6";
420 port-irq4-pins = <10>;
421 port-irq5-pins = <9>;
422 port-irq6-pins = <8>;