Lines Matching +full:clock +full:- +full:names
4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/clock/ra_clock.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
15 xtal: clock-main-osc {
16 compatible = "renesas,ra-cgc-external-clock";
17 clock-frequency = <DT_FREQ_M(20)>;
18 #clock-cells = <0>;
22 hoco: clock-hoco {
23 compatible = "fixed-clock";
24 clock-frequency = <DT_FREQ_M(48)>;
25 #clock-cells = <0>;
28 moco: clock-moco {
29 compatible = "fixed-clock";
30 clock-frequency = <DT_FREQ_M(8)>;
31 #clock-cells = <0>;
34 loco: clock-loco {
35 compatible = "fixed-clock";
36 clock-frequency = <32768>;
37 #clock-cells = <0>;
40 subclk: clock-subclk {
41 compatible = "renesas,ra-cgc-subclk";
42 clock-frequency = <32768>;
43 #clock-cells = <0>;
48 compatible = "renesas,ra-cgc-pll";
49 #clock-cells = <0>;
57 compatible = "renesas,ra-cgc-pll-out";
61 #clock-cells = <0>;
65 compatible = "renesas,ra-cgc-pll-out";
69 #clock-cells = <0>;
73 compatible = "renesas,ra-cgc-pll-out";
77 #clock-cells = <0>;
83 compatible = "renesas,ra-cgc-pll";
84 #clock-cells = <0>;
91 compatible = "renesas,ra-cgc-pll-out";
95 #clock-cells = <0>;
99 compatible = "renesas,ra-cgc-pll-out";
103 #clock-cells = <0>;
107 compatible = "renesas,ra-cgc-pll-out";
111 #clock-cells = <0>;
117 compatible = "renesas,ra-cgc-pclk-block";
120 reg-names = "MSTPA", "MSTPB","MSTPC",
122 #clock-cells = <0>;
127 compatible = "renesas,ra-cgc-pclk";
128 clock-frequency = <480000000>;
130 #clock-cells = <2>;
135 compatible = "renesas,ra-cgc-pclk";
137 #clock-cells = <2>;
142 compatible = "renesas,ra-cgc-pclk";
144 #clock-cells = <2>;
149 compatible = "renesas,ra-cgc-pclk";
151 #clock-cells = <2>;
156 compatible = "renesas,ra-cgc-pclk";
158 #clock-cells = <2>;
163 compatible = "renesas,ra-cgc-pclk";
165 #clock-cells = <2>;
170 compatible = "renesas,ra-cgc-pclk";
172 #clock-cells = <2>;
177 compatible = "renesas,ra-cgc-pclk";
180 compatible = "renesas,ra-cgc-busclk";
181 clk-out-div = <2>;
183 #clock-cells = <0>;
185 #clock-cells = <2>;
190 compatible = "renesas,ra-cgc-pclk";
192 #clock-cells = <2>;
197 compatible = "renesas,ra-cgc-pclk";
198 #clock-cells = <2>;
203 compatible = "renesas,ra-cgc-pclk";
204 #clock-cells = <2>;
209 compatible = "renesas,ra-cgc-pclk";
210 #clock-cells = <2>;
215 compatible = "renesas,ra-cgc-pclk";
216 #clock-cells = <2>;
221 compatible = "renesas,ra-cgc-pclk";
222 #clock-cells = <2>;
227 compatible = "renesas,ra-cgc-pclk";
228 #clock-cells = <2>;
233 compatible = "renesas,ra-cgc-pclk";
234 #clock-cells = <2>;
239 compatible = "renesas,ra-cgc-pclk";
240 #clock-cells = <2>;
248 compatible = "renesas,ra-usbhs";
251 interrupt-names = "usbhs-ir";
252 num-bidir-endpoints = <10>;
254 phys-clock = <&uclk>, <&u60clk>;
257 compatible = "renesas,ra-udc";
263 usbhs_phy: usbhs-phy {
264 compatible = "renesas,ra-usbphyc";
265 #phy-cells = <0>;
270 port-irqs = <&port_irq6 &port_irq7 &port_irq8
273 port-irq-names = "port-irq6",
274 "port-irq7",
275 "port-irq8",
276 "port-irq9",
277 "port-irq10",
278 "port-irq11",
279 "port-irq12",
280 "port-irq13",
281 "port-irq14";
282 port-irq6-pins = <0>;
283 port-irq7-pins = <1>;
284 port-irq8-pins = <2>;
285 port-irq9-pins = <4>;
286 port-irq10-pins = <5>;
287 port-irq11-pins = <6>;
288 port-irq12-pins = <8>;
289 port-irq13-pins = <9 15>;
290 port-irq14-pins = <10>;
294 port-irqs = <&port_irq0 &port_irq1 &port_irq2>;
295 port-irq-names = "port-irq0",
296 "port-irq1",
297 "port-irq2";
298 port-irq0-pins = <5>;
299 port-irq1-pins = <1 4>;
300 port-irq2-pins = <0>;
304 port-irqs = <&port_irq0 &port_irq1 &port_irq2
306 port-irq-names = "port-irq0",
307 "port-irq1",
308 "port-irq2",
309 "port-irq3";
310 port-irq0-pins = <6>;
311 port-irq1-pins = <5>;
312 port-irq2-pins = <3 13>;
313 port-irq3-pins = <2 8 12>;
317 port-irqs = <&port_irq4 &port_irq5 &port_irq6
319 port-irq-names = "port-irq4",
320 "port-irq5",
321 "port-irq6",
322 "port-irq8",
323 "port-irq9";
324 port-irq4-pins = <0>;
325 port-irq5-pins = <2>;
326 port-irq6-pins = <1>;
327 port-irq8-pins = <5>;
328 port-irq9-pins = <4>;
332 port-irqs = <&port_irq0 &port_irq4 &port_irq5
335 port-irq-names = "port-irq0",
336 "port-irq4",
337 "port-irq5",
338 "port-irq6",
339 "port-irq7",
340 "port-irq8",
341 "port-irq9",
342 "port-irq14",
343 "port-irq15";
344 port-irq0-pins = <0>;
345 port-irq4-pins = <2 11>;
346 port-irq5-pins = <1 10>;
347 port-irq6-pins = <9>;
348 port-irq7-pins = <8>;
349 port-irq8-pins = <15>;
350 port-irq9-pins = <14>;
351 port-irq14-pins = <3>;
352 port-irq15-pins = <4>;
356 port-irqs = <&port_irq1 &port_irq2 &port_irq3
358 port-irq-names = "port-irq1",
359 "port-irq2",
360 "port-irq3",
361 "port-irq14",
362 "port-irq15";
363 port-irq1-pins = <8>;
364 port-irq2-pins = <9>;
365 port-irq3-pins = <10>;
366 port-irq14-pins = <12>;
367 port-irq15-pins = <11>;
371 port-irqs = <&port_irq7>;
372 port-irq-names = "port-irq7";
373 port-irq7-pins = <15>;
377 port-irqs = <&port_irq7 &port_irq8 &port_irq10
379 port-irq-names = "port-irq7",
380 "port-irq8",
381 "port-irq10",
382 "port-irq11";
383 port-irq7-pins = <6>;
384 port-irq8-pins = <7>;
385 port-irq10-pins = <9>;
386 port-irq11-pins = <8>;
390 port-irqs = <&port_irq0 &port_irq11 &port_irq12
392 port-irq-names = "port-irq0",
393 "port-irq11",
394 "port-irq12",
395 "port-irq14",
396 "port-irq15";
397 port-irq0-pins = <6>;
398 port-irq11-pins = <0>;
399 port-irq12-pins = <1>;
400 port-irq14-pins = <4>;
401 port-irq15-pins = <8>;
405 port-irqs = <&port_irq8 &port_irq9 &port_irq10
407 port-irq-names = "port-irq8",
408 "port-irq9",
409 "port-irq10",
410 "port-irq11";
411 port-irq8-pins = <5>;
412 port-irq9-pins = <6>;
413 port-irq10-pins = <7>;
414 port-irq11-pins = <8>;
418 port-irqs = <&port_irq4 &port_irq5 &port_irq6>;
419 port-irq-names = "port-irq4",
420 "port-irq5",
421 "port-irq6";
422 port-irq4-pins = <10>;
423 port-irq5-pins = <9>;
424 port-irq6-pins = <8>;
428 has-internal-output;
429 has-output-amplifier;