Lines Matching +full:pll +full:- +full:clock +full:- +full:names

4  * SPDX-License-Identifier: Apache-2.0
7 #include <arm/renesas/ra/ra6/ra6-cm4-common.dtsi>
8 #include <zephyr/dt-bindings/clock/ra_clock.h>
9 #include <zephyr/dt-bindings/pwm/ra_pwm.h>
14 compatible = "mmio-sram";
19 compatible = "renesas,ra-sci";
21 interrupt-names = "rxi", "txi", "tei", "eri";
26 compatible = "renesas,ra-sci-uart";
33 compatible = "renesas,ra-sci";
35 interrupt-names = "rxi", "txi", "tei", "eri";
40 compatible = "renesas,ra-sci-uart";
47 compatible = "renesas,ra-sci";
49 interrupt-names = "rxi", "txi", "tei", "eri";
54 compatible = "renesas,ra-sci-uart";
61 compatible = "renesas,ra-iic";
68 channel-count = <13>;
69 channel-available-mask = <0x1f00ff>;
73 channel-count = <9>;
74 channel-available-mask = <0x700e7>;
78 compatible = "renesas,ra-pwm";
83 #pwm-cells = <3>;
89 #address-cells = <1>;
90 #size-cells = <1>;
92 xtal: clock-main-osc {
93 compatible = "renesas,ra-cgc-external-clock";
94 clock-frequency = <DT_FREQ_M(12)>;
95 #clock-cells = <0>;
99 hoco: clock-hoco {
100 compatible = "fixed-clock";
101 clock-frequency = <DT_FREQ_M(20)>;
102 #clock-cells = <0>;
105 moco: clock-moco {
106 compatible = "fixed-clock";
107 clock-frequency = <DT_FREQ_M(8)>;
108 #clock-cells = <0>;
111 loco: clock-loco {
112 compatible = "fixed-clock";
113 clock-frequency = <32768>;
114 #clock-cells = <0>;
117 subclk: clock-subclk {
118 compatible = "renesas,ra-cgc-subclk";
119 clock-frequency = <32768>;
120 #clock-cells = <0>;
124 pll: pll { label
125 compatible = "renesas,ra-cgc-pll";
126 #clock-cells = <0>;
128 /* PLL */
136 compatible = "renesas,ra-cgc-pclk-block";
139 reg-names = "MSTPA", "MSTPB","MSTPC",
141 #clock-cells = <0>;
142 clocks = <&pll>;
146 compatible = "renesas,ra-cgc-pclk";
148 #clock-cells = <2>;
153 compatible = "renesas,ra-cgc-pclk";
155 #clock-cells = <2>;
160 compatible = "renesas,ra-cgc-pclk";
162 #clock-cells = <2>;
167 compatible = "renesas,ra-cgc-pclk";
169 #clock-cells = <2>;
174 compatible = "renesas,ra-cgc-pclk";
176 #clock-cells = <2>;
181 compatible = "renesas,ra-cgc-pclk";
184 compatible = "renesas,ra-cgc-busclk";
185 clk-out-div = <2>;
187 #clock-cells = <0>;
189 #clock-cells = <2>;
194 compatible = "renesas,ra-cgc-pclk";
196 #clock-cells = <2>;
201 compatible = "renesas,ra-cgc-pclk";
203 #clock-cells = <2>;
208 compatible = "renesas,ra-cgc-pclk";
209 #clock-cells = <2>;
217 port-irqs = <&port_irq6 &port_irq7 &port_irq8
220 port-irq-names = "port-irq6",
221 "port-irq7",
222 "port-irq8",
223 "port-irq9",
224 "port-irq10",
225 "port-irq11",
226 "port-irq12",
227 "port-irq13";
228 port-irq6-pins = <0>;
229 port-irq7-pins = <1>;
230 port-irq8-pins = <2>;
231 port-irq9-pins = <4>;
232 port-irq10-pins = <5>;
233 port-irq11-pins = <6>;
234 port-irq12-pins = <8>;
235 port-irq13-pins = <9 15>;
239 port-irqs = <&port_irq0 &port_irq1 &port_irq2
241 port-irq-names = "port-irq0",
242 "port-irq1",
243 "port-irq2",
244 "port-irq3",
245 "port-irq4";
246 port-irq0-pins = <5>;
247 port-irq1-pins = <1 4>;
248 port-irq2-pins = <0>;
249 port-irq3-pins = <10>;
250 port-irq4-pins = <11>;
254 port-irqs = <&port_irq0 &port_irq1 &port_irq2
256 port-irq-names = "port-irq0",
257 "port-irq1",
258 "port-irq2",
259 "port-irq3";
260 port-irq0-pins = <6>;
261 port-irq1-pins = <5>;
262 port-irq2-pins = <3 13>;
263 port-irq3-pins = <2 12>;
267 port-irqs = <&port_irq5 &port_irq6
269 port-irq-names = "port-irq5",
270 "port-irq6",
271 "port-irq8",
272 "port-irq9";
273 port-irq5-pins = <2>;
274 port-irq6-pins = <1>;
275 port-irq8-pins = <5>;
276 port-irq9-pins = <4>;
280 port-irqs = <&port_irq0 &port_irq4 &port_irq5
283 port-irq-names = "port-irq0",
284 "port-irq4",
285 "port-irq5",
286 "port-irq6",
287 "port-irq7",
288 "port-irq8",
289 "port-irq9";
290 port-irq0-pins = <0>;
291 port-irq4-pins = <2 11>;
292 port-irq5-pins = <1 10>;
293 port-irq6-pins = <9>;
294 port-irq7-pins = <8>;
295 port-irq8-pins = <15>;
296 port-irq9-pins = <14>;
300 port-irqs = <&port_irq11 &port_irq12 &port_irq14
302 port-irq-names = "port-irq11",
303 "port-irq12",
304 "port-irq14",
305 "port-irq15";
306 port-irq11-pins = <1>;
307 port-irq12-pins = <2>;
308 port-irq14-pins = <5 12>;
309 port-irq15-pins = <6 11>;
313 port-irqs = <&port_irq10 &port_irq11>;
314 port-irq-names = "port-irq10",
315 "port-irq11";
316 port-irq10-pins = <9>;
317 port-irq11-pins = <8>;