Lines Matching +full:pll +full:- +full:clock +full:- +full:names
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/renesas/ra/ra4/ra4-cm33-common.dtsi>
8 #include <zephyr/dt-bindings/clock/ra_clock.h>
9 #include <zephyr/dt-bindings/pwm/ra_pwm.h>
11 /delete-node/ &spi1;
16 compatible = "mmio-sram";
21 compatible = "renesas,ra-gpio-ioport";
24 gpio-controller;
25 #gpio-cells = <2>;
31 compatible = "renesas,ra-gpio-ioport";
34 gpio-controller;
35 #gpio-cells = <2>;
41 compatible = "renesas,ra-gpio-ioport";
44 gpio-controller;
45 #gpio-cells = <2>;
51 compatible = "renesas,ra-sci";
53 interrupt-names = "rxi", "txi", "tei", "eri";
58 compatible = "renesas,ra-sci-uart";
65 compatible = "renesas,ra-sci";
67 interrupt-names = "rxi", "txi", "tei", "eri";
72 compatible = "renesas,ra-sci-uart";
79 compatible = "renesas,ra-sci";
81 interrupt-names = "rxi", "txi", "tei", "eri";
86 compatible = "renesas,ra-sci-uart";
93 compatible = "renesas,ra-sci";
95 interrupt-names = "rxi", "txi", "tei", "eri";
100 compatible = "renesas,ra-sci-uart";
107 channel-count = <12>;
108 channel-available-mask = <0x33ff>;
112 channel-count = <10>;
113 channel-available-mask = <0x7f0007>;
117 compatible = "renesas,ra-pwm";
122 #pwm-cells = <3>;
127 compatible = "renesas,ra-pwm";
132 #pwm-cells = <3>;
137 compatible = "renesas,ra-pwm";
142 #pwm-cells = <3>;
147 compatible = "renesas,ra-pwm";
152 #pwm-cells = <3>;
158 #address-cells = <1>;
159 #size-cells = <1>;
161 xtal: clock-main-osc {
162 compatible = "renesas,ra-cgc-external-clock";
163 clock-frequency = <DT_FREQ_M(24)>;
164 #clock-cells = <0>;
168 hoco: clock-hoco {
169 compatible = "fixed-clock";
170 clock-frequency = <DT_FREQ_M(20)>;
171 #clock-cells = <0>;
174 moco: clock-moco {
175 compatible = "fixed-clock";
176 clock-frequency = <DT_FREQ_M(8)>;
177 #clock-cells = <0>;
180 loco: clock-loco {
181 compatible = "fixed-clock";
182 clock-frequency = <32768>;
183 #clock-cells = <0>;
186 subclk: clock-subclk {
187 compatible = "renesas,ra-cgc-subclk";
188 clock-frequency = <32768>;
189 #clock-cells = <0>;
193 pll: pll { label
194 compatible = "renesas,ra-cgc-pll";
195 #clock-cells = <0>;
197 /* PLL */
205 compatible = "renesas,ra-cgc-pll";
206 #clock-cells = <0>;
213 compatible = "renesas,ra-cgc-pclk-block";
216 reg-names = "MSTPA", "MSTPB","MSTPC",
218 #clock-cells = <0>;
219 clocks = <&pll>;
223 compatible = "renesas,ra-cgc-pclk";
225 #clock-cells = <2>;
230 compatible = "renesas,ra-cgc-pclk";
232 #clock-cells = <2>;
237 compatible = "renesas,ra-cgc-pclk";
239 #clock-cells = <2>;
244 compatible = "renesas,ra-cgc-pclk";
246 #clock-cells = <2>;
251 compatible = "renesas,ra-cgc-pclk";
253 #clock-cells = <2>;
258 compatible = "renesas,ra-cgc-pclk";
260 #clock-cells = <2>;
265 compatible = "renesas,ra-cgc-pclk";
266 #clock-cells = <2>;
271 compatible = "renesas,ra-cgc-pclk";
272 #clock-cells = <2>;
280 port-irqs = <&port_irq6 &port_irq7 &port_irq8
283 port-irq-names = "port-irq6",
284 "port-irq7",
285 "port-irq8",
286 "port-irq9",
287 "port-irq10",
288 "port-irq11",
289 "port-irq12",
290 "port-irq13";
291 port-irq6-pins = <0>;
292 port-irq7-pins = <1>;
293 port-irq8-pins = <2>;
294 port-irq9-pins = <4>;
295 port-irq10-pins = <5>;
296 port-irq11-pins = <6>;
297 port-irq12-pins = <8>;
298 port-irq13-pins = <9 15>;
302 port-irqs = <&port_irq0 &port_irq1 &port_irq2
304 port-irq-names = "port-irq0",
305 "port-irq1",
306 "port-irq2",
307 "port-irq3",
308 "port-irq4";
309 port-irq0-pins = <5>;
310 port-irq1-pins = <1 4>;
311 port-irq2-pins = <0>;
312 port-irq3-pins = <10>;
313 port-irq4-pins = <11>;
317 port-irqs = <&port_irq0 &port_irq1 &port_irq2
319 port-irq-names = "port-irq0",
320 "port-irq1",
321 "port-irq2",
322 "port-irq3";
323 port-irq0-pins = <6>;
324 port-irq1-pins = <5>;
325 port-irq2-pins = <3 13>;
326 port-irq3-pins = <2 12>;
330 port-irqs = <&port_irq5 &port_irq6
332 port-irq-names = "port-irq5",
333 "port-irq6",
334 "port-irq8",
335 "port-irq9";
336 port-irq5-pins = <2>;
337 port-irq6-pins = <1>;
338 port-irq8-pins = <5>;
339 port-irq9-pins = <4>;
343 port-irqs = <&port_irq0 &port_irq4 &port_irq5
346 port-irq-names = "port-irq0",
347 "port-irq4",
348 "port-irq5",
349 "port-irq6",
350 "port-irq7",
351 "port-irq8",
352 "port-irq9",
353 "port-irq14",
354 "port-irq15";
355 port-irq0-pins = <0>;
356 port-irq4-pins = <2 11>;
357 port-irq5-pins = <1 10>;
358 port-irq6-pins = <9>;
359 port-irq7-pins = <8>;
360 port-irq8-pins = <15>;
361 port-irq9-pins = <14>;
362 port-irq14-pins = <3>;
363 port-irq15-pins = <4>;
367 port-irqs = <&port_irq11 &port_irq12 &port_irq14
369 port-irq-names = "port-irq11",
370 "port-irq12",
371 "port-irq14",
372 "port-irq15";
373 port-irq11-pins = <1>;
374 port-irq12-pins = <2>;
375 port-irq14-pins = <5 12>;
376 port-irq15-pins = <6 11>;
380 port-irqs = <&port_irq10 &port_irq11>;
381 port-irq-names = "port-irq10",
382 "port-irq11";
383 port-irq10-pins = <9>;
384 port-irq11-pins = <8>;