Lines Matching +full:channel +full:- +full:num
4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
14 #include <zephyr/dt-bindings/reset/nxp_syscon_reset_common.h>
22 #address-cells = <1>;
23 #size-cells = <0>;
26 compatible = "arm,cortex-m33f";
28 cpu-power-states = <&idle &suspend>;
29 #address-cells = <1>;
30 #size-cells = <1>;
33 compatible = "arm,armv8m-mpu";
38 power-states {
40 compatible = "zephyr,power-state";
41 power-state-name = "runtime-idle";
42 min-residency-us = <10>;
45 compatible = "zephyr,power-state";
46 power-state-name = "suspend-to-idle";
47 min-residency-us = <1000>;
54 #address-cells = <1>;
55 #size-cells = <1>;
67 compatible = "mmio-sram";
72 compatible = "mmio-sram";
77 compatible = "zephyr,memory-region", "mmio-sram";
79 zephyr,memory-region = "SRAM1";
80 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
93 #address-cells = <1>;
94 #size-cells = <1>;
98 * addresses differ between non-secure (0x40000000) and secure
108 compatible = "nxp,lpc-syscon";
110 #clock-cells = <1>;
114 compatible = "nxp,lpc-iocon";
117 compatible = "nxp,rt-iocon-pinctrl";
123 compatible = "nxp,lpc-syscon";
125 #clock-cells = <1>;
131 #reset-cells = <1>;
137 #reset-cells = <1>;
141 compatible = "nxp,lpc-uid";
146 compatible = "nxp,lpc-gpio";
148 #address-cells = <1>;
149 #size-cells = <0>;
152 compatible = "nxp,lpc-gpio-port";
153 int-source = "pint";
154 gpio-controller;
155 #gpio-cells = <2>;
160 compatible = "nxp,lpc-gpio-port";
161 int-source = "pint";
162 gpio-controller;
163 #gpio-cells = <2>;
168 compatible = "nxp,lpc-gpio-port";
169 gpio-controller;
170 #gpio-cells = <2>;
175 compatible = "nxp,lpc-gpio-port";
176 gpio-controller;
177 #gpio-cells = <2>;
182 compatible = "nxp,lpc-gpio-port";
183 gpio-controller;
184 #gpio-cells = <2>;
189 compatible = "nxp,lpc-gpio-port";
190 gpio-controller;
191 #gpio-cells = <2>;
199 interrupt-controller;
200 #interrupt-cells = <1>;
201 #address-cells = <0>;
204 num-lines = <8>;
205 num-inputs = <64>;
209 compatible = "nxp,lpc-flexcomm";
218 compatible = "nxp,lpc-flexcomm";
227 compatible = "nxp,lpc-flexcomm";
236 compatible = "nxp,lpc-flexcomm";
245 compatible = "nxp,lpc-flexcomm";
254 compatible = "nxp,lpc-flexcomm";
263 compatible = "nxp,lpc-flexcomm";
272 compatible = "nxp,lpc-flexcomm";
281 compatible = "nxp,lpc-i2c";
293 num-bidir-endpoints = <6>;
304 compatible = "nxp,lpc-spi";
305 /* Enabling cs-gpios below will allow using GPIO CS,
307 /* cs-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>,
316 #address-cells = <1>;
317 #size-cells = <0>;
320 dma0: dma-controller@104000 {
321 compatible = "nxp,lpc-dma";
324 dma-channels = <33>;
326 #dma-cells = <1>;
329 dma1: dma-controller@105000 {
330 compatible = "nxp,lpc-dma";
333 dma-channels = <33>;
335 #dma-cells = <1>;
339 #address-cells = <1>;
340 #size-cells = <0>;
347 pdmc0: dmic-channel@0 {
353 pdmc1: dmic-channel@1 {
359 pdmc2: dmic-channel@2 {
365 pdmc3: dmic-channel@3 {
371 pdmc4: dmic-channel@4 {
377 pdmc5: dmic-channel@5 {
383 pdmc6: dmic-channel@6 {
389 pdmc7: dmic-channel@7 {
397 compatible = "nxp,os-timer";
404 compatible = "nxp,lpc-rtc";
409 compatible = "nxp,lpc-rtc-highres";
415 compatible = "nxp,kinetis-trng";
422 compatible = "nxp,sctimer-pwm";
428 #pwm-cells = <3>;
432 compatible = "nxp,lpc-wwdt";
436 clk-divider = <1>;
440 compatible = "nxp,lpc-wwdt";
444 clk-divider = <1>;
448 compatible = "nxp,imx-usdhc";
453 max-current-330 = <1020>;
454 max-current-180 = <1020>;
455 max-bus-freq = <208000000>;
456 min-bus-freq = <400000>;
460 compatible = "nxp,imx-usdhc";
465 max-current-330 = <1020>;
466 max-current-180 = <1020>;
467 max-bus-freq = <208000000>;
468 min-bus-freq = <400000>;
472 compatible = "nxp,lpc-lpadc";
476 clk-divider = <1>;
477 clk-source = <0>;
478 voltage-ref= <1>;
479 calibration-average = <128>;
480 power-level = <0>;
481 offset-value-a = <10>;
482 offset-value-b = <10>;
483 #io-channel-cells = <1>;
488 compatible = "nxp,lpc-ctimer";
492 clk-source = <1>;
500 compatible = "nxp,lpc-ctimer";
504 clk-source = <1>;
512 compatible = "nxp,lpc-ctimer";
516 clk-source = <1>;
524 compatible = "nxp,lpc-ctimer";
528 clk-source = <1>;
536 compatible = "nxp,lpc-ctimer";
540 clk-source = <1>;
548 compatible = "nxp,mcux-i3c";
552 clk-divider = <2>;
553 clk-divider-slow = <1>;
554 clk-divider-tc = <1>;
556 #address-cells = <3>;
557 #size-cells = <0>;
564 num-channels = <4>;
565 num-bits = <24>;
568 #address-cells = <1>;
569 #size-cells = <0>;
572 compatible = "nxp,mrt-channel";
577 compatible = "nxp,mrt-channel";
582 compatible = "nxp,mrt-channel";
587 compatible = "nxp,mrt-channel";
595 compatible = "nxp,imx-flexspi";
597 #address-cells = <1>;
598 #size-cells = <0>;
604 arm,num-irq-priority-bits = <3>;