Lines Matching +full:pre +full:- +full:div
2 * Copyright 2021,2023-2024 NXP
4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/imx_ccm_rev2.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/power/imx_spc.h>
15 #include <zephyr/dt-bindings/mipi_dsi/mipi_dsi.h>
22 #address-cells = <1>;
23 #size-cells = <0>;
27 compatible = "arm,cortex-m7";
30 #address-cells = <1>;
31 #size-cells = <1>;
32 d-cache-line-size = <32>;
35 compatible = "arm,armv7m-mpu";
41 compatible = "arm,cortex-m4f";
43 d-cache-line-size = <32>;
45 #address-cells = <1>;
46 #size-cells = <1>;
49 compatible = "arm,armv7m-mpu";
54 power-states {
56 * Power states are managed with set points (see page 30-35 of RT1170
67 compatible = "zephyr,power-state";
68 power-state-name="runtime-idle";
69 substate-id = <IMX_SPC_SET_POINT_1_WAIT>;
70 min-residency-us = <100>;
75 compatible = "zephyr,power-state";
76 power-state-name="suspend-to-idle";
77 substate-id = <IMX_SPC_SET_POINT_10_SUSPEND>;
78 min-residency-us = <5000>;
79 exit-latency-us = <500>;
84 xtal: xtal-osc {
85 compatible = "fixed-clock";
86 clock-frequency = <24000000>;
87 #clock-cells = <0>;
92 compatible = "nxp,imx-flexspi";
95 #address-cells = <1>;
96 #size-cells = <0>;
102 compatible = "nxp,imx-flexspi";
105 #address-cells = <1>;
106 #size-cells = <0>;
112 compatible = "nxp,imx-semc";
115 #address-cells = <1>;
116 #size-cells = <1>;
121 compatible = "nxp,gpt-hw-timer";
128 compatible = "nxp,imx-gpt";
136 compatible = "nxp,imx-gpt";
144 compatible = "nxp,imx-gpt";
152 compatible = "nxp,imx-gpt";
160 compatible = "nxp,imx-gpt";
168 compatible = "nxp,qtmr-pwm";
176 compatible = "nxp,qtmr-pwm";
184 compatible = "nxp,qtmr-pwm";
192 compatible = "nxp,qtmr-pwm";
200 compatible = "nxp,imx-ccm-rev2";
203 #clock-cells = <3>;
209 * as Fout = 24MHz * (clock-mult / clock-div)
211 arm_pll: arm-pll {
212 compatible = "fixed-factor-clock";
213 #clock-cells = <0>;
219 compatible = "nxp,imx-gpio";
222 gpio-controller;
223 #gpio-cells = <2>;
233 compatible = "nxp,imx-gpio";
236 gpio-controller;
237 #gpio-cells = <2>;
241 compatible = "nxp,imx-gpio";
244 gpio-controller;
245 #gpio-cells = <2>;
249 compatible = "nxp,imx-gpio";
251 gpio-controller;
252 #gpio-cells = <2>;
256 compatible = "nxp,imx-gpio";
258 gpio-controller;
259 #gpio-cells = <2>;
263 compatible = "nxp,imx-gpio";
265 gpio-controller;
266 #gpio-cells = <2>;
270 compatible = "nxp,imx-gpio";
272 gpio-controller;
273 #gpio-cells = <2>;
277 compatible = "nxp,imx-gpio";
279 gpio-controller;
280 #gpio-cells = <2>;
284 compatible = "nxp,imx-gpio";
286 gpio-controller;
287 #gpio-cells = <2>;
291 compatible = "nxp,imx-gpio";
293 gpio-controller;
294 #gpio-cells = <2>;
298 compatible = "nxp,imx-gpio";
301 gpio-controller;
302 #gpio-cells = <2>;
307 clock-frequency = <I2C_BITRATE_STANDARD>;
308 #address-cells = <1>;
309 #size-cells = <0>;
318 clock-frequency = <I2C_BITRATE_STANDARD>;
319 #address-cells = <1>;
320 #size-cells = <0>;
329 clock-frequency = <I2C_BITRATE_STANDARD>;
330 #address-cells = <1>;
331 #size-cells = <0>;
340 clock-frequency = <I2C_BITRATE_STANDARD>;
341 #address-cells = <1>;
342 #size-cells = <0>;
351 clock-frequency = <I2C_BITRATE_STANDARD>;
352 #address-cells = <1>;
353 #size-cells = <0>;
362 clock-frequency = <I2C_BITRATE_STANDARD>;
363 #address-cells = <1>;
364 #size-cells = <0>;
372 compatible = "nxp,imx-iomuxc";
377 compatible = "nxp,mcux-rt11xx-pinctrl";
382 compatible = "nxp,mcux-rt-pinctrl";
388 compatible = "nxp,imx-gpr";
390 #pinmux-cells = <2>;
393 lcdif: display-controller@40804000 {
394 compatible = "nxp,imx-elcdif";
401 mipi_dsi: mipi-dsi@4080c000 {
402 compatible = "nxp,imx-mipi-dsi";
403 #address-cells = <1>;
404 #size-cells = <0>;
419 #address-cells = <1>;
420 #size-cells = <0>;
429 #address-cells = <1>;
430 #size-cells = <0>;
439 #address-cells = <1>;
440 #size-cells = <0>;
449 #address-cells = <1>;
450 #size-cells = <0>;
459 #address-cells = <1>;
460 #size-cells = <0>;
469 #address-cells = <1>;
470 #size-cells = <0>;
575 compatible = "nxp,imx-pwm";
578 #pwm-cells = <3>;
585 compatible = "nxp,imx-pwm";
588 #pwm-cells = <3>;
595 compatible = "nxp,imx-pwm";
598 #pwm-cells = <3>;
605 compatible = "nxp,imx-pwm";
608 #pwm-cells = <3>;
621 compatible = "nxp,imx-pwm";
624 #pwm-cells = <3>;
631 compatible = "nxp,imx-pwm";
634 #pwm-cells = <3>;
641 compatible = "nxp,imx-pwm";
644 #pwm-cells = <3>;
651 compatible = "nxp,imx-pwm";
654 #pwm-cells = <3>;
667 compatible = "nxp,imx-pwm";
670 #pwm-cells = <3>;
677 compatible = "nxp,imx-pwm";
680 #pwm-cells = <3>;
687 compatible = "nxp,imx-pwm";
690 #pwm-cells = <3>;
697 compatible = "nxp,imx-pwm";
700 #pwm-cells = <3>;
713 compatible = "nxp,imx-pwm";
716 #pwm-cells = <3>;
723 compatible = "nxp,imx-pwm";
726 #pwm-cells = <3>;
733 compatible = "nxp,imx-pwm";
736 #pwm-cells = <3>;
743 compatible = "nxp,imx-pwm";
746 #pwm-cells = <3>;
774 compatible = "nxp,enet-mac";
776 interrupt-names = "COMMON";
778 nxp,ptp-clock = <&enet_ptp_clock>;
782 compatible = "nxp,enet-mdio";
784 #address-cells = <1>;
785 #size-cells = <0>;
788 compatible = "nxp,enet-ptp-clock";
801 compatible = "nxp,enet-mac";
803 interrupt-names = "COMMON";
805 nxp,ptp-clock = <&enet1g_ptp_clock>;
809 compatible = "nxp,enet-mdio";
811 #address-cells = <1>;
812 #size-cells = <0>;
815 compatible = "nxp,enet-ptp-clock";
823 compatible = "nxp,imx-caam";
834 interrupt-names = "usb_otg";
836 num-bidir-endpoints = <8>;
844 interrupt-names = "usb_otg";
846 num-bidir-endpoints = <8>;
863 compatible = "nxp,imx-usdhc";
868 max-current-330 = <1020>;
869 max-current-180 = <1020>;
870 max-bus-freq = <208000000>;
871 min-bus-freq = <400000>;
875 compatible = "nxp,imx-usdhc";
880 max-current-330 = <1020>;
881 max-current-180 = <1020>;
882 max-bus-freq = <208000000>;
883 min-bus-freq = <400000>;
887 compatible = "nxp,imx-csi";
894 remote-endpoint-label = "mipi_csi2rx_ep_out";
900 compatible = "nxp,mipi-csi2rx";
908 #address-cells = <1>;
909 #size-cells = <0>;
914 remote-endpoint-label = "csi_ep_in";
925 compatible = "nxp,flexcan-fd", "nxp,flexcan";
928 interrupt-names = "common", "error";
930 clk-source = <0>;
935 compatible = "nxp,flexcan-fd", "nxp,flexcan";
938 interrupt-names = "common", "error";
940 clk-source = <0>;
945 compatible = "nxp,flexcan-fd", "nxp,flexcan";
948 interrupt-names = "common", "error";
950 clk-source = <0>;
955 compatible = "nxp,imx-wdog";
962 compatible = "zephyr,memory-region", "mmio-sram";
963 zephyr,memory-region = "OCRAM";
968 compatible = "zephyr,memory-region", "mmio-sram";
969 zephyr,memory-region = "OCRAM1";
974 compatible = "zephyr,memory-region", "mmio-sram";
975 zephyr,memory-region = "OCRAM2";
980 compatible = "nxp,lpc-lpadc";
984 voltage-ref= <1>;
985 calibration-average = <128>;
986 power-level = <0>;
987 offset-value-a = <10>;
988 offset-value-b = <10>;
989 #io-channel-cells = <1>;
994 compatible = "nxp,lpc-lpadc";
998 clk-divider = <8>;
999 clk-source = <0>;
1000 voltage-ref= <1>;
1001 calibration-average = <128>;
1002 power-level = <1>;
1003 offset-value-a = <10>;
1004 offset-value-b = <10>;
1005 #io-channel-cells = <1>;
1010 compatible = "nxp,kinetis-acmp";
1017 compatible = "nxp,kinetis-acmp";
1024 compatible = "nxp,kinetis-acmp";
1031 compatible = "nxp,kinetis-acmp";
1038 compatible = "nxp,imx-anatop";
1040 #clock-cells = <4>;
1041 #pll-clock-cells = <3>;
1044 edma0: dma-controller@40070000 {
1045 #dma-cells = <2>;
1046 compatible = "nxp,mcux-edma";
1048 dma-channels = <32>;
1049 dma-requests = <208>;
1061 irq-shared-offset = <16>;
1064 edma_lpsr0: dma-controller@40c14000 {
1065 #dma-cells = <2>;
1066 compatible = "nxp,mcux-edma";
1068 dma-channels = <32>;
1069 dma-requests = <208>;
1081 irq-shared-offset = <16>;
1089 #dma-cells = <0>;
1093 compatible = "nxp,imx-gpr";
1095 #pinmux-cells = <2>;
1099 compatible = "nxp,mcux-i2s";
1100 #address-cells = <1>;
1101 #size-cells = <0>;
1102 #pinmux-cells = <2>;
1106 clock-mux = <4>;
1107 pre-div = <0>;
1109 pll-clocks = <&anatop 0 0 0>,
1114 pll-clock-names = "src", "lp", "pd", "num", "den";
1117 nxp,tx-channel = <1>;
1122 compatible = "nxp,mcux-i2s";
1123 #address-cells = <1>;
1124 #size-cells = <0>;
1125 #pinmux-cells = <2>;
1129 clock-mux = <4>;
1130 pre-div = <0>;
1132 pll-clocks = <&anatop 0 0 0>,
1137 pll-clock-names = "src", "lp", "pd", "num", "den";
1140 nxp,tx-channel = <1>;
1145 compatible = "nxp,mcux-i2s";
1146 #address-cells = <1>;
1147 #size-cells = <0>;
1148 #pinmux-cells = <2>;
1152 clock-mux = <4>;
1153 pre-div = <0>;
1155 pll-clocks = <&anatop 0 0 0>,
1160 pll-clock-names = "src", "lp", "pd", "num", "den";
1163 nxp,tx-channel = <1>;
1168 compatible = "nxp,mcux-i2s";
1169 #address-cells = <1>;
1170 #size-cells = <0>;
1171 #pinmux-cells = <2>;
1175 clock-mux = <6>;
1176 pre-div = <0>;
1178 pll-clocks = <&anatop 0 0 0>,
1183 pll-clock-names = "src", "lp", "pd", "num", "den";
1186 nxp,tx-channel = <1>;
1190 src: reset-controller@40c04000 {
1191 compatible = "nxp,imx-src-rev2";
1198 compatible = "nxp,mcux-qdec";
1205 compatible = "nxp,mcux-qdec";
1212 compatible = "nxp,mcux-qdec";
1219 compatible = "nxp,mcux-qdec";
1226 compatible = "nxp,mcux-xbar";
1233 compatible = "nxp,mcux-xbar";
1239 compatible = "nxp,mcux-xbar";
1249 max-load-value = <0xffffffff>;
1251 #address-cells = <1>;
1252 #size-cells = <0>;
1255 compatible = "nxp,pit-channel";
1261 compatible = "nxp,pit-channel";
1267 compatible = "nxp,pit-channel";
1273 compatible = "nxp,pit-channel";
1284 max-load-value = <0xffffffff>;
1286 #address-cells = <1>;
1287 #size-cells = <0>;
1290 compatible = "nxp,pit-channel";
1295 compatible = "nxp,pit-channel";
1300 compatible = "nxp,pit-channel";
1305 compatible = "nxp,pit-channel";
1314 arm,num-irq-priority-bits = <4>;