Lines Matching +full:pre +full:- +full:div
4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/imx_ccm.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/memory-controller/nxp,flexram.h>
19 die-temp0 = &tempmon;
23 #address-cells = <1>;
24 #size-cells = <0>;
28 compatible = "arm,cortex-m7";
29 d-cache-line-size = <32>;
31 cpu-power-states = <&idle &suspend>;
32 #address-cells = <1>;
33 #size-cells = <1>;
36 compatible = "arm,armv7m-mpu";
41 compatible = "arm,armv7m-itm";
43 swo-ref-frequency = <132000000>;
47 power-states {
49 compatible = "zephyr,power-state";
50 power-state-name = "runtime-idle";
51 exit-latency-us = <4000>;
52 min-residency-us = <5000>;
55 compatible = "zephyr,power-state";
56 power-state-name = "suspend-to-idle";
57 exit-latency-us = <5000>;
58 min-residency-us = <10000>;
63 sysclk: system-clock {
64 compatible = "fixed-clock";
65 clock-frequency = <600000000>;
66 #clock-cells = <0>;
69 xtal: clock-xtal {
70 compatible = "fixed-clock";
71 clock-frequency = <24000000>;
72 #clock-cells = <0>;
75 rtc_xtal: clock-rtc-xtal {
76 compatible = "fixed-clock";
77 clock-frequency = <32768>;
78 #clock-cells = <0>;
82 usbclk: usbpll-clock {
83 compatible = "fixed-clock";
84 clock-frequency = <480000000>;
85 #clock-cells = <0>;
94 #address-cells = <1>;
95 #size-cells = <1>;
99 flexram,bank-size = <32>;
102 compatible = "zephyr,memory-region", "nxp,imx-itcm";
104 zephyr,memory-region = "ITCM";
108 compatible = "zephyr,memory-region", "nxp,imx-dtcm";
110 zephyr,memory-region = "DTCM";
114 compatible = "zephyr,memory-region", "mmio-sram";
116 zephyr,memory-region = "OCRAM";
121 compatible = "nxp,imx-flexspi";
124 #address-cells = <1>;
125 #size-cells = <0>;
126 ahb-bufferable;
127 ahb-cacheable;
133 compatible = "nxp,imx-flexspi";
136 #address-cells = <1>;
137 #size-cells = <0>;
138 ahb-bufferable;
139 ahb-cacheable;
145 compatible = "nxp,imx-semc";
148 #address-cells = <1>;
149 #size-cells = <1>;
154 compatible = "nxp,gpt-hw-timer";
161 compatible = "nxp,imx-gpt";
169 compatible = "nxp,imx-qtmr";
174 compatible = "nxp,imx-tmr";
179 compatible = "nxp,imx-tmr";
184 compatible = "nxp,imx-tmr";
189 compatible = "nxp,imx-tmr";
196 compatible = "nxp,imx-qtmr";
201 compatible = "nxp,imx-tmr";
206 compatible = "nxp,imx-tmr";
211 compatible = "nxp,imx-tmr";
216 compatible = "nxp,imx-tmr";
223 compatible = "nxp,imx-qtmr";
228 compatible = "nxp,imx-tmr";
233 compatible = "nxp,imx-tmr";
238 compatible = "nxp,imx-tmr";
243 compatible = "nxp,imx-tmr";
250 compatible = "nxp,imx-qtmr";
255 compatible = "nxp,imx-tmr";
260 compatible = "nxp,imx-tmr";
265 compatible = "nxp,imx-tmr";
270 compatible = "nxp,imx-tmr";
277 compatible = "nxp,imx-ccm";
280 clock-names = "xtal", "rtc-xtal";
282 arm-podf {
283 compatible = "fixed-factor-clock";
284 clock-div = <1>;
285 #clock-cells = <0>;
288 ahb-podf {
289 compatible = "fixed-factor-clock";
290 clock-div = <1>;
291 #clock-cells = <0>;
294 ipg-podf {
295 compatible = "fixed-factor-clock";
296 clock-div = <1>;
297 #clock-cells = <0>;
300 sys-pll {
301 compatible = "nxp,imx-ccm-fnpll";
302 loop-div = <22>;
306 #clock-cells = <0>;
309 #clock-cells = <3>;
313 compatible = "nxp,imx-snvs";
317 compatible = "nxp,imx-snvs-rtc";
323 compatible = "nxp,imx-gpio";
326 gpio-controller;
327 #gpio-cells = <2>;
331 compatible = "nxp,imx-gpio";
334 gpio-controller;
335 #gpio-cells = <2>;
339 compatible = "nxp,imx-gpio";
342 gpio-controller;
343 #gpio-cells = <2>;
347 compatible = "nxp,imx-gpio";
350 gpio-controller;
351 #gpio-cells = <2>;
355 compatible = "nxp,imx-gpio";
358 gpio-controller;
359 #gpio-cells = <2>;
362 * Note: interrupts for GPIO6-9 are not currently supported
366 compatible = "nxp,imx-gpio";
368 gpio-controller;
369 #gpio-cells = <2>;
373 compatible = "nxp,imx-gpio";
375 gpio-controller;
376 #gpio-cells = <2>;
380 compatible = "nxp,imx-gpio";
382 gpio-controller;
383 #gpio-cells = <2>;
387 compatible = "nxp,imx-gpio";
389 gpio-controller;
390 #gpio-cells = <2>;
395 clock-frequency = <I2C_BITRATE_STANDARD>;
396 #address-cells = <1>;
397 #size-cells = <0>;
406 clock-frequency = <I2C_BITRATE_STANDARD>;
407 #address-cells = <1>;
408 #size-cells = <0>;
417 clock-frequency = <I2C_BITRATE_STANDARD>;
418 #address-cells = <1>;
419 #size-cells = <0>;
428 clock-frequency = <I2C_BITRATE_STANDARD>;
429 #address-cells = <1>;
430 #size-cells = <0>;
438 compatible = "nxp,imx-iomuxc";
443 compatible = "nxp,mcux-rt-pinctrl";
447 lcdif: display-controller@402b8000 {
448 compatible = "nxp,imx-elcdif";
461 #address-cells = <1>;
462 #size-cells = <0>;
471 #address-cells = <1>;
472 #size-cells = <0>;
481 #address-cells = <1>;
482 #size-cells = <0>;
491 #address-cells = <1>;
492 #size-cells = <0>;
501 dma-names = "tx", "rx";
511 dma-names = "tx", "rx";
521 dma-names = "tx", "rx";
531 dma-names = "tx", "rx";
541 dma-names = "tx", "rx";
551 dma-names = "tx", "rx";
561 dma-names = "tx", "rx";
571 dma-names = "tx", "rx";
576 compatible = "nxp,mcux-12b1msps-sar";
579 clk-divider = <1>;
580 sample-period-mode = <0>;
582 #io-channel-cells = <1>;
586 compatible = "nxp,mcux-12b1msps-sar";
589 clk-divider = <1>;
590 sample-period-mode = <0>;
592 #io-channel-cells = <1>;
601 compatible = "nxp,imx-pwm";
604 #pwm-cells = <3>;
611 compatible = "nxp,imx-pwm";
614 #pwm-cells = <3>;
621 compatible = "nxp,imx-pwm";
624 #pwm-cells = <3>;
631 compatible = "nxp,imx-pwm";
634 #pwm-cells = <3>;
647 compatible = "nxp,imx-pwm";
650 #pwm-cells = <3>;
657 compatible = "nxp,imx-pwm";
660 #pwm-cells = <3>;
667 compatible = "nxp,imx-pwm";
670 #pwm-cells = <3>;
677 compatible = "nxp,imx-pwm";
680 #pwm-cells = <3>;
693 compatible = "nxp,imx-pwm";
696 #pwm-cells = <3>;
703 compatible = "nxp,imx-pwm";
706 #pwm-cells = <3>;
713 compatible = "nxp,imx-pwm";
716 #pwm-cells = <3>;
723 compatible = "nxp,imx-pwm";
726 #pwm-cells = <3>;
739 compatible = "nxp,imx-pwm";
742 #pwm-cells = <3>;
749 compatible = "nxp,imx-pwm";
752 #pwm-cells = <3>;
759 compatible = "nxp,imx-pwm";
762 #pwm-cells = <3>;
769 compatible = "nxp,imx-pwm";
772 #pwm-cells = <3>;
784 compatible = "nxp,enet-mac";
786 interrupt-names = "COMMON";
788 nxp,ptp-clock = <&enet_ptp_clock>;
792 compatible = "nxp,enet-mdio";
794 #address-cells = <1>;
795 #size-cells = <0>;
798 compatible = "nxp,enet-ptp-clock";
805 src: reset-controller@400f8000 {
806 compatible = "nxp,imx-src";
812 compatible = "nxp,kinetis-trng";
822 interrupt-names = "usb_otg";
824 num-bidir-endpoints = <8>;
832 interrupt-names = "usb_otg";
834 num-bidir-endpoints = <8>;
851 compatible = "nxp,imx-usdhc";
856 max-current-330 = <1020>;
857 max-current-180 = <1020>;
858 max-bus-freq = <208000000>;
859 min-bus-freq = <400000>;
863 compatible = "nxp,imx-usdhc";
868 max-current-330 = <120>;
869 max-current-180 = <45>;
870 max-bus-freq = <198000000>;
871 min-bus-freq = <400000>;
875 compatible = "nxp,imx-csi";
881 edma0: dma-controller@400e8000 {
882 #dma-cells = <2>;
883 compatible = "nxp,mcux-edma";
885 dma-channels = <32>;
886 dma-requests = <128>;
896 irq-shared-offset = <16>;
905 interrupt-names = "common";
907 clk-source = <2>;
915 interrupt-names = "common";
917 clk-source = <2>;
922 compatible = "nxp,flexcan-fd", "nxp,flexcan";
925 interrupt-names = "common";
927 clk-source = <2>;
932 compatible = "nxp,imx-wdog";
939 compatible = "nxp,imx-wdog";
946 compatible = "nxp,imx-anatop";
948 #clock-cells = <4>;
949 #pll-clock-cells = <3>;
953 compatible = "nxp,imx-gpr";
955 #pinmux-cells = <2>;
963 #dma-cells = <0>;
967 compatible = "nxp,mcux-i2s";
968 #address-cells = <1>;
969 #size-cells = <0>;
970 #pinmux-cells = <2>;
974 clock-mux = <2>;
979 pll-clocks = <&anatop 0x70 0xC000 0>,
984 pll-clock-names = "src", "lp", "pd", "num", "den";
986 * Based on this requirement, pre-div must be at least 3
987 * The pre-div and post-div are one less than the actual divide-by amount.
988 * A pre-div value of 0x1 results in a pre-divider of
991 pre-div = <0x3>;
996 dma-names = "rx", "tx";
1000 nxp,tx-channel = <1>;
1001 nxp,tx-dma-channel = <0>;
1002 nxp,rx-dma-channel = <1>;
1007 compatible = "nxp,mcux-i2s";
1008 #address-cells = <1>;
1009 #size-cells = <0>;
1010 #pinmux-cells = <2>;
1014 clock-mux = <2>;
1015 pre-div = <0>;
1017 pll-clocks = <&anatop 0x70 0xC000 0x0>,
1022 pll-clock-names = "src", "lp", "pd", "num", "den";
1026 dma-names = "rx", "tx";
1027 nxp,tx-channel = <0>;
1028 nxp,tx-dma-channel = <3>;
1029 nxp,rx-dma-channel = <4>;
1034 compatible = "nxp,mcux-i2s";
1035 #address-cells = <1>;
1036 #size-cells = <0>;
1037 #pinmux-cells = <2>;
1041 clock-mux = <2>;
1042 pre-div = <0>;
1044 pll-clocks = <&anatop 0x70 0xC000 0>,
1049 pll-clock-names = "src", "lp", "pd", "num", "den";
1053 dma-names = "rx", "tx";
1054 nxp,tx-channel = <0>;
1055 nxp,tx-dma-channel = <5>;
1056 nxp,rx-dma-channel = <6>;
1061 compatible = "nxp,mcux-qdec";
1068 compatible = "nxp,mcux-qdec";
1075 compatible = "nxp,mcux-qdec";
1082 compatible = "nxp,mcux-qdec";
1089 compatible = "nxp,mcux-xbar";
1096 compatible = "nxp,mcux-xbar";
1102 compatible = "nxp,mcux-xbar";
1108 compatible = "nxp,mcux-dcp";
1125 max-load-value = <0xffffffff>;
1127 #address-cells = <1>;
1128 #size-cells = <0>;
1131 compatible = "nxp,pit-channel";
1137 compatible = "nxp,pit-channel";
1143 compatible = "nxp,pit-channel";
1149 compatible = "nxp,pit-channel";
1166 arm,num-irq-priority-bits = <4>;