Lines Matching +full:ahb +full:- +full:cacheable
4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/imx_ccm.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/memory-controller/nxp,flexram.h>
18 die-temp0 = &tempmon;
26 #address-cells = <1>;
27 #size-cells = <0>;
31 compatible = "arm,cortex-m7";
32 d-cache-line-size = <32>;
34 cpu-power-states = <&idle &suspend>;
35 #address-cells = <1>;
36 #size-cells = <1>;
39 compatible = "arm,armv7m-mpu";
44 compatible = "arm,armv7m-itm";
46 swo-ref-frequency = <132000000>;
50 power-states {
52 compatible = "zephyr,power-state";
53 power-state-name = "runtime-idle";
54 exit-latency-us = <4000>;
55 min-residency-us = <5000>;
58 compatible = "zephyr,power-state";
59 power-state-name = "suspend-to-idle";
60 exit-latency-us = <5000>;
61 min-residency-us = <10000>;
66 sysclk: system-clock {
67 compatible = "fixed-clock";
68 clock-frequency = <600000000>;
69 #clock-cells = <0>;
72 xtal: clock-xtal {
73 compatible = "fixed-clock";
74 clock-frequency = <24000000>;
75 #clock-cells = <0>;
78 rtc_xtal: clock-rtc-xtal {
79 compatible = "fixed-clock";
80 clock-frequency = <32768>;
81 #clock-cells = <0>;
85 usbclk: usbpll-clock {
86 compatible = "fixed-clock";
87 clock-frequency = <480000000>;
88 #clock-cells = <0>;
97 #address-cells = <1>;
98 #size-cells = <1>;
102 flexram,bank-size = <32>;
105 compatible = "zephyr,memory-region", "nxp,imx-itcm";
107 zephyr,memory-region = "ITCM";
111 compatible = "zephyr,memory-region", "nxp,imx-dtcm";
113 zephyr,memory-region = "DTCM";
117 compatible = "zephyr,memory-region", "mmio-sram";
119 zephyr,memory-region = "OCRAM";
124 compatible = "nxp,imx-flexspi";
127 #address-cells = <1>;
128 #size-cells = <0>;
129 ahb-bufferable;
130 ahb-cacheable;
136 compatible = "nxp,imx-flexspi";
139 #address-cells = <1>;
140 #size-cells = <0>;
141 ahb-bufferable;
142 ahb-cacheable;
148 compatible = "nxp,imx-semc";
151 #address-cells = <1>;
152 #size-cells = <1>;
157 compatible = "nxp,gpt-hw-timer";
164 compatible = "nxp,imx-gpt";
172 compatible = "nxp,imx-qtmr";
177 compatible = "nxp,imx-tmr";
182 compatible = "nxp,imx-tmr";
187 compatible = "nxp,imx-tmr";
192 compatible = "nxp,imx-tmr";
199 compatible = "nxp,imx-qtmr";
204 compatible = "nxp,imx-tmr";
209 compatible = "nxp,imx-tmr";
214 compatible = "nxp,imx-tmr";
219 compatible = "nxp,imx-tmr";
226 compatible = "nxp,imx-qtmr";
231 compatible = "nxp,imx-tmr";
236 compatible = "nxp,imx-tmr";
241 compatible = "nxp,imx-tmr";
246 compatible = "nxp,imx-tmr";
253 compatible = "nxp,imx-qtmr";
258 compatible = "nxp,imx-tmr";
263 compatible = "nxp,imx-tmr";
268 compatible = "nxp,imx-tmr";
273 compatible = "nxp,imx-tmr";
280 compatible = "nxp,imx-ccm";
283 clock-names = "xtal", "rtc-xtal";
285 arm-podf {
286 compatible = "fixed-factor-clock";
287 clock-div = <1>;
288 #clock-cells = <0>;
291 ahb-podf {
292 compatible = "fixed-factor-clock";
293 clock-div = <1>;
294 #clock-cells = <0>;
297 ipg-podf {
298 compatible = "fixed-factor-clock";
299 clock-div = <1>;
300 #clock-cells = <0>;
303 sys-pll {
304 compatible = "nxp,imx-ccm-fnpll";
305 loop-div = <22>;
309 #clock-cells = <0>;
312 #clock-cells = <3>;
316 compatible = "nxp,imx-snvs";
320 compatible = "nxp,imx-snvs-rtc";
326 compatible = "nxp,imx-gpio";
329 gpio-controller;
330 #gpio-cells = <2>;
334 compatible = "nxp,imx-gpio";
337 gpio-controller;
338 #gpio-cells = <2>;
342 compatible = "nxp,imx-gpio";
345 gpio-controller;
346 #gpio-cells = <2>;
350 compatible = "nxp,imx-gpio";
353 gpio-controller;
354 #gpio-cells = <2>;
358 compatible = "nxp,imx-gpio";
361 gpio-controller;
362 #gpio-cells = <2>;
365 * Note: interrupts for GPIO6-9 are not currently supported
369 compatible = "nxp,imx-gpio";
371 gpio-controller;
372 #gpio-cells = <2>;
376 compatible = "nxp,imx-gpio";
378 gpio-controller;
379 #gpio-cells = <2>;
383 compatible = "nxp,imx-gpio";
385 gpio-controller;
386 #gpio-cells = <2>;
390 compatible = "nxp,imx-gpio";
392 gpio-controller;
393 #gpio-cells = <2>;
398 clock-frequency = <I2C_BITRATE_STANDARD>;
399 #address-cells = <1>;
400 #size-cells = <0>;
409 clock-frequency = <I2C_BITRATE_STANDARD>;
410 #address-cells = <1>;
411 #size-cells = <0>;
420 clock-frequency = <I2C_BITRATE_STANDARD>;
421 #address-cells = <1>;
422 #size-cells = <0>;
431 clock-frequency = <I2C_BITRATE_STANDARD>;
432 #address-cells = <1>;
433 #size-cells = <0>;
441 compatible = "nxp,imx-iomuxc";
446 compatible = "nxp,mcux-rt-pinctrl";
450 lcdif: display-controller@402b8000 {
451 compatible = "nxp,imx-elcdif";
464 rx-fifo-size = <16>;
465 tx-fifo-size = <16>;
466 #address-cells = <1>;
467 #size-cells = <0>;
476 rx-fifo-size = <16>;
477 tx-fifo-size = <16>;
478 #address-cells = <1>;
479 #size-cells = <0>;
488 rx-fifo-size = <16>;
489 tx-fifo-size = <16>;
490 #address-cells = <1>;
491 #size-cells = <0>;
500 rx-fifo-size = <16>;
501 tx-fifo-size = <16>;
502 #address-cells = <1>;
503 #size-cells = <0>;
512 dma-names = "tx", "rx";
522 dma-names = "tx", "rx";
532 dma-names = "tx", "rx";
542 dma-names = "tx", "rx";
552 dma-names = "tx", "rx";
562 dma-names = "tx", "rx";
572 dma-names = "tx", "rx";
582 dma-names = "tx", "rx";
587 compatible = "nxp,mcux-12b1msps-sar";
590 clk-divider = <1>;
591 sample-period-mode = <0>;
593 #io-channel-cells = <1>;
597 compatible = "nxp,mcux-12b1msps-sar";
600 clk-divider = <1>;
601 sample-period-mode = <0>;
603 #io-channel-cells = <1>;
612 compatible = "nxp,imx-pwm";
615 #pwm-cells = <3>;
622 compatible = "nxp,imx-pwm";
625 #pwm-cells = <3>;
632 compatible = "nxp,imx-pwm";
635 #pwm-cells = <3>;
642 compatible = "nxp,imx-pwm";
645 #pwm-cells = <3>;
658 compatible = "nxp,imx-pwm";
661 #pwm-cells = <3>;
668 compatible = "nxp,imx-pwm";
671 #pwm-cells = <3>;
678 compatible = "nxp,imx-pwm";
681 #pwm-cells = <3>;
688 compatible = "nxp,imx-pwm";
691 #pwm-cells = <3>;
704 compatible = "nxp,imx-pwm";
707 #pwm-cells = <3>;
714 compatible = "nxp,imx-pwm";
717 #pwm-cells = <3>;
724 compatible = "nxp,imx-pwm";
727 #pwm-cells = <3>;
734 compatible = "nxp,imx-pwm";
737 #pwm-cells = <3>;
750 compatible = "nxp,imx-pwm";
753 #pwm-cells = <3>;
760 compatible = "nxp,imx-pwm";
763 #pwm-cells = <3>;
770 compatible = "nxp,imx-pwm";
773 #pwm-cells = <3>;
780 compatible = "nxp,imx-pwm";
783 #pwm-cells = <3>;
795 compatible = "nxp,enet-mac";
797 interrupt-names = "COMMON";
799 nxp,ptp-clock = <&enet_ptp_clock>;
803 compatible = "nxp,enet-mdio";
805 #address-cells = <1>;
806 #size-cells = <0>;
809 compatible = "nxp,enet-ptp-clock";
816 src: reset-controller@400f8000 {
817 compatible = "nxp,imx-src";
823 compatible = "nxp,kinetis-trng";
833 interrupt-names = "usb_otg";
835 num-bidir-endpoints = <8>;
843 interrupt-names = "usb_otg";
845 num-bidir-endpoints = <8>;
862 compatible = "nxp,imx-usdhc";
867 max-current-330 = <1020>;
868 max-current-180 = <1020>;
869 max-bus-freq = <208000000>;
870 min-bus-freq = <400000>;
874 compatible = "nxp,imx-usdhc";
879 max-current-330 = <120>;
880 max-current-180 = <45>;
881 max-bus-freq = <198000000>;
882 min-bus-freq = <400000>;
886 compatible = "nxp,imx-csi";
892 edma0: dma-controller@400e8000 {
893 #dma-cells = <2>;
894 compatible = "nxp,mcux-edma";
896 dma-channels = <32>;
897 dma-requests = <128>;
906 irq-shared-offset = <16>;
915 interrupt-names = "common";
917 clk-source = <2>;
925 interrupt-names = "common";
927 clk-source = <2>;
932 compatible = "nxp,flexcan-fd", "nxp,flexcan";
935 interrupt-names = "common";
937 clk-source = <2>;
942 compatible = "nxp,imx-wdog";
949 compatible = "nxp,imx-wdog";
956 compatible = "nxp,imx-anatop";
958 #clock-cells = <4>;
959 #pll-clock-cells = <3>;
963 compatible = "nxp,imx-gpr";
965 #pinmux-cells = <2>;
973 #dma-cells = <0>;
977 compatible = "nxp,mcux-i2s";
978 #address-cells = <1>;
979 #size-cells = <0>;
980 #pinmux-cells = <2>;
984 clock-mux = <2>;
989 pll-clocks = <&anatop 0x70 0xC000 0>,
994 pll-clock-names = "src", "lp", "pd", "num", "den";
996 * Based on this requirement, pre-div must be at least 3
997 * The pre-div and post-div are one less than the actual divide-by amount.
998 * A pre-div value of 0x1 results in a pre-divider of
1001 pre-div = <0x3>;
1006 dma-names = "rx", "tx";
1010 nxp,tx-channel = <1>;
1011 nxp,tx-dma-channel = <0>;
1012 nxp,rx-dma-channel = <1>;
1017 compatible = "nxp,mcux-i2s";
1018 #address-cells = <1>;
1019 #size-cells = <0>;
1020 #pinmux-cells = <2>;
1024 clock-mux = <2>;
1025 pre-div = <0>;
1027 pll-clocks = <&anatop 0x70 0xC000 0x0>,
1032 pll-clock-names = "src", "lp", "pd", "num", "den";
1036 dma-names = "rx", "tx";
1037 nxp,tx-channel = <0>;
1038 nxp,tx-dma-channel = <3>;
1039 nxp,rx-dma-channel = <4>;
1044 compatible = "nxp,mcux-i2s";
1045 #address-cells = <1>;
1046 #size-cells = <0>;
1047 #pinmux-cells = <2>;
1051 clock-mux = <2>;
1052 pre-div = <0>;
1054 pll-clocks = <&anatop 0x70 0xC000 0>,
1059 pll-clock-names = "src", "lp", "pd", "num", "den";
1063 dma-names = "rx", "tx";
1064 nxp,tx-channel = <0>;
1065 nxp,tx-dma-channel = <5>;
1066 nxp,rx-dma-channel = <6>;
1071 compatible = "nxp,mcux-qdec";
1078 compatible = "nxp,mcux-qdec";
1085 compatible = "nxp,mcux-qdec";
1092 compatible = "nxp,mcux-qdec";
1099 compatible = "nxp,mcux-xbar";
1106 compatible = "nxp,mcux-xbar";
1112 compatible = "nxp,mcux-xbar";
1118 compatible = "nxp,mcux-dcp";
1135 max-load-value = <0xffffffff>;
1137 #address-cells = <1>;
1138 #size-cells = <0>;
1141 compatible = "nxp,pit-channel";
1147 compatible = "nxp,pit-channel";
1153 compatible = "nxp,pit-channel";
1159 compatible = "nxp,pit-channel";
1176 arm,num-irq-priority-bits = <4>;