Lines Matching +full:reg +full:- +full:names
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv8-m.dtsi>
8 #include <zephyr/dt-bindings/adc/adc.h>
9 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/inputmux/inputmux_trigger_ports.h>
14 #include <zephyr/dt-bindings/reset/nxp_syscon_reset_common.h>
18 #address-cells = <1>;
19 #size-cells = <0>;
22 compatible = "arm,cortex-m33f";
23 reg = <0>;
24 #address-cells = <1>;
25 #size-cells = <1>;
28 compatible = "arm,armv8m-mpu";
29 reg = <0xe000ed90 0x40>;
36 #address-cells = <1>;
37 #size-cells = <1>;
44 compatible = "mmio-sram";
45 reg = <0x04000000 DT_SIZE_K(16)>;
48 compatible = "mmio-sram";
49 reg = <0x20000000 DT_SIZE_K(16)>;
52 compatible = "mmio-sram";
53 reg = <0x20004000 DT_SIZE_K(16)>;
56 compatible = "mmio-sram";
57 reg = <0x20008000 DT_SIZE_K(32)>;
60 compatible = "mmio-sram";
61 reg = <0x20010000 DT_SIZE_K(32)>;
64 compatible = "mmio-sram";
65 reg = <0x20018000 DT_SIZE_K(16)>;
70 #address-cells = <1>;
71 #size-cells = <1>;
74 compatible = "nxp,lpc-syscon";
75 reg = <0x0 0x1000>;
76 #clock-cells = <1>;
78 compatible = "nxp,lpc-syscon-reset";
79 #reset-cells = <1>;
83 iap: flash-controller@34000 {
84 compatible = "nxp,iap-fmc553";
85 reg = <0x34000 0x1000>;
86 #address-cells = <1>;
87 #size-cells = <1>;
91 compatible = "soc-nv-flash";
92 reg = <0x0 DT_SIZE_K(246)>;
93 erase-block-size = <512>;
94 write-block-size = <512>;
98 compatible = "soc-nv-flash";
99 reg = <0x0003d800 DT_SIZE_K(10)>;
104 compatible = "soc-nv-flash";
105 reg = <0x3000000 DT_SIZE_K(128)>;
110 compatible = "nxp,lpc-iocon";
111 reg = <0x1000 0x100>;
112 #address-cells = <1>;
113 #size-cells = <1>;
116 compatible = "nxp,lpc-iocon-pinctrl";
121 compatible = "nxp,lpc-gpio";
122 reg = <0x8c000 0x2488>;
123 #address-cells = <1>;
124 #size-cells = <0>;
126 compatible = "nxp,lpc-gpio-port";
127 int-source = "pint";
128 gpio-controller;
129 #gpio-cells = <2>;
130 reg = <0>;
134 compatible = "nxp,lpc-gpio-port";
135 int-source = "pint";
136 gpio-controller;
137 #gpio-cells = <2>;
138 reg = <1>;
142 compatible = "nxp,lpc-gpio-port";
143 gpio-controller;
144 #gpio-cells = <2>;
145 reg = <2>;
149 dma0: dma-controller@82000 {
150 compatible = "nxp,lpc-dma";
151 reg = <0x82000 0x1000>;
153 dma-channels = <52>;
154 nxp,dma-num-of-otrigs = <4>;
155 nxp,dma-otrig-base-address = <LPC55S36_DMA0_OTRIG_BASE>;
156 nxp,dma-itrig-base-address = <LPC55S36_DMA0_ITRIG_BASE>;
158 #dma-cells = <1>;
161 dma1: dma-controller@a7000 {
162 compatible = "nxp,lpc-dma";
163 reg = <0xa7000 0x1000>;
165 dma-channels = <16>;
166 nxp,dma-num-of-otrigs = <4>;
167 nxp,dma-otrig-base-address = <LPC55S36_DMA1_OTRIG_BASE>;
168 nxp,dma-itrig-base-address = <LPC55S36_DMA1_ITRIG_BASE>;
170 #dma-cells = <1>;
175 reg = <0x4000 0x1000>;
176 interrupt-controller;
177 #interrupt-cells = <1>;
178 #address-cells = <0>;
181 num-lines = <8>;
182 num-inputs = <64>;
186 compatible = "nxp,lpc-flexcomm";
187 reg = <0x86000 0x1000>;
192 dma-names = "rx", "tx";
197 compatible = "nxp,lpc-flexcomm";
198 reg = <0x87000 0x1000>;
203 dma-names = "rx", "tx";
208 compatible = "nxp,lpc-flexcomm";
209 reg = <0x88000 0x1000>;
214 dma-names = "rx", "tx";
219 compatible = "nxp,lpc-flexcomm";
220 reg = <0x89000 0x1000>;
225 dma-names = "rx", "tx";
230 compatible = "nxp,lpc-flexcomm";
231 reg = <0x8a000 0x1000>;
236 dma-names = "rx", "tx";
241 compatible = "nxp,lpc-flexcomm";
242 reg = <0x96000 0x1000>;
247 dma-names = "rx", "tx";
252 compatible = "nxp,lpc-flexcomm";
253 reg = <0x97000 0x1000>;
258 dma-names = "rx", "tx";
263 compatible = "nxp,lpc-flexcomm";
264 reg = <0x98000 0x1000>;
269 dma-names = "rx", "tx";
274 compatible = "nxp,lpc-spi";
275 reg = <0x9f000 0x1000>;
280 dma-names = "rx", "tx";
282 #address-cells = <1>;
283 #size-cells = <0>;
287 compatible = "nxp,lpc-lpadc";
288 reg = <0xA0000 0x1000>;
291 clk-divider = <8>;
292 clk-source = <0>;
293 voltage-ref= <1>;
294 calibration-average = <128>;
295 power-level = <0>;
296 offset-value-a = <10>;
297 offset-value-b = <10>;
298 #io-channel-cells = <1>;
300 dma-names = "adc0-dma0", "adc0-dma1";
307 reg = < 0xb2000 0x1000>;
310 voltage-reference = <0>;
311 #io-channel-cells = <1>;
316 reg = < 0xb6000 0x1000>;
319 voltage-reference = <0>;
320 #io-channel-cells = <1>;
325 reg = < 0xb9000 0x1000>;
328 voltage-reference = <0>;
329 #io-channel-cells = <1>;
333 compatible = "nxp,lpc-mcan";
334 reg = <0x4009d000 0x1000>;
336 interrupt-names = "int0", "int1";
339 bosch,mram-cfg = <0x0 15 15 8 8 0 15 15>;
345 reg = <0x400C3000 0x1000>;
346 interrupt-names = "INPUT-CAPTURE", "FAULT", "RELOAD-ERROR";
349 compatible = "nxp,imx-pwm";
351 interrupt-names = "COMPARE-SUB0", "RELOAD-SUB0";
353 #pwm-cells = <3>;
357 run-in-wait;
361 compatible = "nxp,imx-pwm";
363 interrupt-names = "COMPARE-SUB1", "RELOAD-SUB1";
365 #pwm-cells = <3>;
369 run-in-wait;
373 compatible = "nxp,imx-pwm";
375 interrupt-names = "COMPARE-SUB2", "RELOAD-SUB2";
377 #pwm-cells = <3>;
381 run-in-wait;
385 compatible = "nxp,imx-pwm";
387 interrupt-names = "COMPARE-SUB3", "RELOAD-SUB3";
389 #pwm-cells = <3>;
393 run-in-wait;
400 reg = <0x400C5000 0x1000>;
401 interrupt-names = "INPUT-CAPTURE", "FAULT", "RELOAD-ERROR";
404 compatible = "nxp,imx-pwm";
406 interrupt-names = "COMPARE-SUB0", "RELOAD-SUB0";
408 #pwm-cells = <3>;
412 run-in-wait;
416 compatible = "nxp,imx-pwm";
418 interrupt-names = "COMPARE-SUB1", "RELOAD-SUB1";
420 #pwm-cells = <3>;
424 run-in-wait;
428 compatible = "nxp,imx-pwm";
430 interrupt-names = "COMPARE-SUB2", "RELOAD-SUB2";
432 #pwm-cells = <3>;
436 run-in-wait;
440 compatible = "nxp,imx-pwm";
442 interrupt-names = "COMPARE-SUB3", "RELOAD-SUB3";
444 #pwm-cells = <3>;
448 run-in-wait;
454 reg = <0x84000 0x1000>;
456 num-bidir-endpoints = <5>;
457 maximum-speed = "full-speed";
462 compatible = "nxp,sctimer-pwm";
463 reg = <0x85000 0x1000>;
468 #pwm-cells = <3>;
473 regulator-name = "lpc55s36-vref";
474 reg = <0xb5000 0x30>;
476 #nxp,reference-cells = <1>;
477 nxp,buffer-startup-delay-us = <400>;
478 nxp,bandgap-startup-time-us = <20>;
483 arm,num-irq-priority-bits = <3>;