Lines Matching +full:reset +full:- +full:cells
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv8-m.dtsi>
8 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
9 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/reset/nxp_syscon_reset_common.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-m33f";
21 #address-cells = <1>;
22 #size-cells = <1>;
25 compatible = "arm,armv8m-mpu";
33 #address-cells = <1>;
34 #size-cells = <1>;
43 compatible = "mmio-sram";
47 compatible = "mmio-sram";
51 compatible = "mmio-sram";
55 compatible = "mmio-sram";
59 compatible = "mmio-sram";
65 #address-cells = <1>;
66 #size-cells = <1>;
69 compatible = "nxp,lpc-syscon";
71 #clock-cells = <1>;
72 reset: reset { label
73 compatible = "nxp,lpc-syscon-reset";
74 #reset-cells = <1>;
78 iap: flash-controller@34000 {
79 compatible = "nxp,iap-fmc55";
82 #address-cells = <1>;
83 #size-cells = <1>;
86 compatible = "soc-nv-flash";
88 erase-block-size = <512>;
89 write-block-size = <512>;
93 compatible = "soc-nv-flash";
99 compatible = "nxp,lpc-uid";
104 compatible = "soc-nv-flash";
110 compatible = "nxp,lpc-iocon";
112 #address-cells = <1>;
113 #size-cells = <1>;
116 compatible = "nxp,lpc-iocon-pinctrl";
121 compatible = "nxp,lpc-gpio";
123 #address-cells = <1>;
124 #size-cells = <0>;
126 compatible = "nxp,lpc-gpio-port";
127 int-source = "pint";
128 gpio-controller;
129 #gpio-cells = <2>;
134 compatible = "nxp,lpc-gpio-port";
135 int-source = "pint";
136 gpio-controller;
137 #gpio-cells = <2>;
145 interrupt-controller;
146 #interrupt-cells = <1>;
147 #address-cells = <0>;
150 num-lines = <8>;
151 num-inputs = <64>;
155 compatible = "nxp,lpc-flexcomm";
159 resets = <&reset NXP_SYSCON_RESET(1, 11)>;
164 compatible = "nxp,lpc-flexcomm";
168 resets = <&reset NXP_SYSCON_RESET(1, 12)>;
173 compatible = "nxp,lpc-flexcomm";
177 resets = <&reset NXP_SYSCON_RESET(1, 13)>;
182 compatible = "nxp,lpc-flexcomm";
186 resets = <&reset NXP_SYSCON_RESET(1, 14)>;
191 compatible = "nxp,lpc-flexcomm";
195 resets = <&reset NXP_SYSCON_RESET(1, 15)>;
200 compatible = "nxp,lpc-flexcomm";
204 resets = <&reset NXP_SYSCON_RESET(1, 16)>;
209 compatible = "nxp,lpc-flexcomm";
213 resets = <&reset NXP_SYSCON_RESET(1, 17)>;
218 compatible = "nxp,lpc-flexcomm";
222 resets = <&reset NXP_SYSCON_RESET(1, 18)>;
227 compatible = "nxp,lpc-spi";
231 resets = <&reset NXP_SYSCON_RESET(2, 28)>;
233 #address-cells = <1>;
234 #size-cells = <0>;
238 compatible = "nxp,lpc-mcan";
241 interrupt-names = "int0", "int1";
243 resets = <&reset NXP_SYSCON_RESET(1, 7)>;
244 bosch,mram-cfg = <0x0 15 15 8 8 0 15 15>;
249 compatible = "nxp,lpc-rng";
256 arm,num-irq-priority-bits = <3>;