Lines Matching +full:adc12 +full:- +full:prescaler
4 * SPDX-License-Identifier: Apache-2.0
8 #include "armv6-m.dtsi"
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/kinetis_pcc.h>
11 #include <zephyr/dt-bindings/clock/kinetis_scg.h>
12 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #include <zephyr/dt-bindings/i2c/i2c.h>
17 zephyr,flash-controller = &ftfe;
21 #address-cells = <1>;
22 #size-cells = <0>;
25 compatible = "arm,cortex-m0+";
26 clock-frequency = <48000000>;
28 cpu-power-states = <&idle &stop &pstop1 &pstop2>;
31 power-states {
33 compatible = "zephyr,power-state";
34 power-state-name = "runtime-idle";
38 compatible = "zephyr,power-state";
39 power-state-name = "suspend-to-idle";
40 substate-id = <0>;
44 compatible = "zephyr,power-state";
45 power-state-name = "suspend-to-idle";
46 substate-id = <1>;
50 compatible = "zephyr,power-state";
51 power-state-name = "suspend-to-idle";
52 substate-id = <2>;
58 compatible = "zephyr,memory-region", "mmio-sram";
60 zephyr,memory-region = "SRAML";
64 compatible = "zephyr,memory-region", "mmio-sram";
66 zephyr,memory-region = "SRAMU";
70 compatible = "nxp,port-pinctrl";
75 sosc-mode = <KINETIS_SCG_SOSC_MODE_LOW_POWER>;
76 compatible = "nxp,kinetis-scg";
78 #clock-cells = <1>;
81 compatible = "fixed-clock";
82 clock-frequency = <8000000>;
83 #clock-cells = <0>;
87 compatible = "fixed-clock";
88 clock-frequency = <48000000>;
89 #clock-cells = <0>;
93 compatible = "fixed-factor-clock";
95 clock-div = <1>;
96 #clock-cells = <0>;
100 compatible = "fixed-factor-clock";
102 clock-div = <4>;
103 #clock-cells = <0>;
107 compatible = "fixed-factor-clock";
109 clock-div = <2>;
110 #clock-cells = <0>;
114 compatible = "fixed-factor-clock";
116 clock-div = <1>;
117 #clock-cells = <0>;
122 compatible = "nxp,kinetis-pcc";
124 #clock-cells = <2>;
127 ftfe: flash-controller@40020000 {
128 compatible = "nxp,kinetis-ftfe";
131 interrupt-names = "command-complete";
133 #address-cells = <1>;
134 #size-cells = <1>;
137 compatible = "soc-nv-flash";
139 erase-block-size = <DT_SIZE_K(2)>;
140 write-block-size = <8>;
145 compatible = "nxp,adc12";
149 clk-source = <0>;
150 clk-divider = <1>;
152 #io-channel-cells = <1>;
183 clock-frequency = <128000>;
184 prescaler = <1>;
185 clk-source = <1>;
190 compatible = "nxp,port-pinmux";
196 compatible = "nxp,port-pinmux";
202 compatible = "nxp,port-pinmux";
208 compatible = "nxp,port-pinmux";
214 compatible = "nxp,port-pinmux";
223 compatible = "fixed-clock";
224 clock-frequency = <128000>;
225 #clock-cells = <0>;
234 clk-source = <1>;
235 clk-divider = <256>;
240 compatible = "nxp,gpio-cluster";
244 #address-cells = <1>;
245 #size-cells = <1>;
248 compatible = "nxp,kinetis-gpio";
251 gpio-controller;
252 #gpio-cells = <2>;
253 nxp,kinetis-port = <&porta>;
257 compatible = "nxp,kinetis-gpio";
260 gpio-controller;
261 #gpio-cells = <2>;
262 nxp,kinetis-port = <&porte>;
266 compatible = "nxp,kinetis-gpio";
269 gpio-controller;
270 #gpio-cells = <2>;
271 nxp,kinetis-port = <&porta>;
275 compatible = "nxp,kinetis-gpio";
278 gpio-controller;
279 #gpio-cells = <2>;
280 nxp,kinetis-port = <&porte>;
285 compatible = "nxp,gpio-cluster";
289 #address-cells = <1>;
290 #size-cells = <1>;
293 compatible = "nxp,kinetis-gpio";
296 gpio-controller;
297 #gpio-cells = <2>;
298 nxp,kinetis-port = <&portb>;
302 compatible = "nxp,kinetis-gpio";
305 gpio-controller;
306 #gpio-cells = <2>;
307 nxp,kinetis-port = <&portc>;
311 compatible = "nxp,kinetis-gpio";
314 gpio-controller;
315 #gpio-cells = <2>;
316 nxp,kinetis-port = <&portd>;
320 compatible = "nxp,kinetis-gpio";
323 gpio-controller;
324 #gpio-cells = <2>;
325 nxp,kinetis-port = <&portb>;
329 compatible = "nxp,kinetis-gpio";
332 gpio-controller;
333 #gpio-cells = <2>;
334 nxp,kinetis-port = <&portc>;
338 compatible = "nxp,kinetis-gpio";
341 gpio-controller;
342 #gpio-cells = <2>;
343 nxp,kinetis-port = <&portd>;
352 prescaler = <16>;
361 prescaler = <16>;
370 prescaler = <16>;
375 compatible = "nxp,kinetis-pwt";
379 prescaler = <1>;
382 #pwm-cells = <3>;
387 clock-frequency = <I2C_BITRATE_STANDARD>;
388 #address-cells = <1>;
389 #size-cells = <0>;
398 clock-frequency = <I2C_BITRATE_STANDARD>;
399 #address-cells = <1>;
400 #size-cells = <0>;
411 clock-frequency = <32768>;
412 prescaler = <32768>;
417 compatible = "nxp,kinetis-acmp";
430 #address-cells = <1>;
431 #size-cells = <0>;
440 #address-cells = <1>;
441 #size-cells = <0>;
444 edma: dma-controller@40008000 {
445 compatible = "nxp,mcux-edma";
447 dma-channels = <8>;
448 dma-requests = <64>;
454 #dma-cells = <2>;
455 irq-shared-offset = <4>;
469 arm,num-irq-priority-bits = <2>;