Lines Matching +full:rx +full:- +full:tx +full:- +full:chn +full:- +full:share
1 /* SPDX-License-Identifier: Apache-2.0 */
4 #include <arm/armv7-m.dtsi>
5 #include <zephyr/dt-bindings/adc/adc.h>
6 #include <zephyr/dt-bindings/clock/kinetis_sim.h>
7 #include <zephyr/dt-bindings/clock/kinetis_mcg.h>
8 #include <zephyr/dt-bindings/gpio/gpio.h>
9 #include <zephyr/dt-bindings/i2c/i2c.h>
18 zephyr,flash-controller = &ftfe;
22 #address-cells = <1>;
23 #size-cells = <0>;
27 compatible = "arm,cortex-m4f";
32 /* The on-chip SRAM is split into SRAM_L and SRAM_U regions that form a
35 * Cortex-M4 architecture. For clarity and to avoid the temptation for
39 * https://sourceware.org/ml/binutils/2017-02/msg00250.html
42 compatible = "zephyr,memory-region", "mmio-sram";
44 zephyr,memory-region = "SRAML";
48 compatible = "mmio-sram";
53 compatible = "nxp,kinetis-temperature";
54 io-channels = <&adc0 26>, <&adc0 27>;
55 io-channel-names = "SENSOR", "BANDGAP";
56 bandgap-voltage = <1000000>;
58 sensor-slope-cold = <1620>;
59 sensor-slope-hot = <1620>;
64 compatible = "nxp,kinetis-temperature";
65 io-channels = <&adc1 26>, <&adc1 27>;
66 io-channel-names = "SENSOR", "BANDGAP";
67 bandgap-voltage = <1000000>;
69 sensor-slope-cold = <1620>;
70 sensor-slope-hot = <1620>;
77 compatible = "nxp,port-pinctrl";
84 compatible = "nxp,k64f-mpu";
90 mcg: clock-controller@40064000 {
91 compatible = "nxp,kinetis-mcg";
93 #clock-cells = <1>;
96 osc: clock-controller@40065000 {
97 compatible = "nxp,k64f-osc";
100 enable-external-reference;
107 interrupt-names = "alarm", "seconds";
108 clock-frequency = <32768>;
113 compatible = "nxp,kinetis-sim";
115 #clock-cells = <3>;
118 compatible = "fixed-factor-clock";
120 clock-div = <1>;
121 #clock-cells = <0>;
125 compatible = "fixed-factor-clock";
127 clock-div = <2>;
128 #clock-cells = <0>;
132 compatible = "fixed-factor-clock";
134 clock-div = <3>;
135 #clock-cells = <0>;
139 compatible = "fixed-factor-clock";
141 clock-div = <5>;
142 #clock-cells = <0>;
146 ftfe: flash-controller@40020000 {
147 compatible = "nxp,kinetis-ftfe";
150 interrupt-names = "command-complete", "read-collision";
153 #address-cells = <1>;
154 #size-cells = <1>;
157 compatible = "soc-nv-flash";
159 erase-block-size = <4096>;
160 write-block-size = <8>;
165 compatible = "nxp,kinetis-i2c";
166 clock-frequency = <I2C_BITRATE_STANDARD>;
167 #address-cells = <1>;
168 #size-cells = <0>;
176 compatible = "nxp,kinetis-i2c";
177 clock-frequency = <I2C_BITRATE_STANDARD>;
178 #address-cells = <1>;
179 #size-cells = <0>;
187 compatible = "nxp,kinetis-i2c";
188 clock-frequency = <I2C_BITRATE_STANDARD>;
189 #address-cells = <1>;
190 #size-cells = <0>;
198 compatible = "nxp,kinetis-uart";
201 interrupt-names = "status", "error";
208 compatible = "nxp,kinetis-uart";
211 interrupt-names = "status", "error";
218 compatible = "nxp,kinetis-uart";
221 interrupt-names = "status", "error";
228 compatible = "nxp,kinetis-uart";
231 interrupt-names = "status", "error";
238 compatible = "nxp,kinetis-uart";
241 interrupt-names = "status", "error";
248 compatible = "nxp,kinetis-uart";
251 interrupt-names = "status", "error";
258 compatible = "nxp,port-pinmux";
264 compatible = "nxp,port-pinmux";
270 compatible = "nxp,port-pinmux";
276 compatible = "nxp,port-pinmux";
282 compatible = "nxp,port-pinmux";
288 compatible = "nxp,kinetis-gpio";
292 gpio-controller;
293 #gpio-cells = <2>;
294 nxp,kinetis-port = <&porta>;
298 compatible = "nxp,kinetis-gpio";
302 gpio-controller;
303 #gpio-cells = <2>;
304 nxp,kinetis-port = <&portb>;
308 compatible = "nxp,kinetis-gpio";
312 gpio-controller;
313 #gpio-cells = <2>;
314 nxp,kinetis-port = <&portc>;
318 compatible = "nxp,kinetis-gpio";
322 gpio-controller;
323 #gpio-cells = <2>;
324 nxp,kinetis-port = <&portd>;
328 compatible = "nxp,kinetis-gpio";
332 gpio-controller;
333 #gpio-cells = <2>;
334 nxp,kinetis-port = <&porte>;
342 dma-names = "rx", "tx";
343 rx-fifo-size = <4>;
344 tx-fifo-size = <4>;
346 #address-cells = <1>;
347 #size-cells = <0>;
356 dma-names = "rx", "tx";
357 rx-fifo-size = <1>;
358 tx-fifo-size = <1>;
359 nxp,rx-tx-chn-share;
361 #address-cells = <1>;
362 #size-cells = <0>;
371 dma-names = "rx", "tx";
372 rx-fifo-size = <1>;
373 tx-fifo-size = <1>;
374 nxp,rx-tx-chn-share;
376 #address-cells = <1>;
377 #size-cells = <0>;
382 compatible = "nxp,kinetis-wdog";
425 compatible = "nxp,kinetis-adc16";
430 dma-names = "adc0";
431 clk-source = <0>;
434 #io-channel-cells = <1>;
438 compatible = "nxp,kinetis-adc16";
443 dma-names = "adc1";
444 clk-source = <0>;
447 #io-channel-cells = <1>;
451 compatible = "nxp,kinetis-dac";
454 voltage-reference = <1>;
456 #io-channel-cells = <1>;
460 compatible = "nxp,kinetis-dac";
463 voltage-reference = <1>;
465 #io-channel-cells = <1>;
469 compatible = "nxp,kinetis-usbd";
472 interrupt-names = "usb_otg";
473 num-bidir-endpoints = <16>;
482 compatible = "nxp,enet-mac";
484 interrupt-names = "TX", "RX", "ERR";
486 nxp,ptp-clock = <&enet_ptp_clock>;
487 phy-connection-type = "rmii";
491 compatible = "nxp,enet-mdio";
493 #address-cells = <1>;
494 #size-cells = <0>;
497 compatible = "nxp,enet-ptp-clock";
499 interrupt-names = "IEEE1588_TMR";
506 compatible = "nxp,kinetis-rnga";
516 interrupt-names = "mb-0-15", "bus-off", "error", "tx-warning", "rx-warning", "wake-up";
518 clk-source = <1>;
522 edma0: dma-controller@40008000 {
523 #dma-cells = <2>;
524 compatible = "nxp,mcux-edma";
526 dma-channels = <16>;
527 dma-requests = <64>;
546 max-load-value = <0xffffffff>;
547 #address-cells = <1>;
548 #size-cells = <0>;
551 compatible = "nxp,pit-channel";
558 compatible = "nxp,pit-channel";
565 compatible = "nxp,pit-channel";
572 compatible = "nxp,pit-channel";
582 arm,num-irq-priority-bits = <4>;