Lines Matching +full:pinmux +full:- +full:cells
4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/kinetis_sim.h>
11 #include <zephyr/dt-bindings/clock/kinetis_mcg.h>
12 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #include <zephyr/dt-bindings/i2c/i2c.h>
18 zephyr,flash-controller = &ftfe;
26 #address-cells = <1>;
27 #size-cells = <0>;
31 compatible = "arm,cortex-m4f";
36 /* The on-chip SRAM is split into SRAM_L and SRAM_U regions that form a
39 * Cortex-M4 architecture. For clarity and to avoid the temptation for
43 * https://sourceware.org/ml/binutils/2017-02/msg00250.html
46 compatible = "zephyr,memory-region", "mmio-sram";
48 zephyr,memory-region = "SRAML";
52 compatible = "mmio-sram";
58 compatible = "nxp,port-pinctrl";
63 mcg: clock-controller@40064000 {
64 compatible = "nxp,kinetis-mcg";
66 #clock-cells = <1>;
69 osc: clock-controller@40065000 {
70 compatible = "nxp,k22f-osc";
73 enable-external-reference;
77 compatible = "nxp,k22f-rtc";
79 clock-frequency = <32768>;
83 compatible = "nxp,kinetis-sim";
85 #clock-cells = <3>;
88 compatible = "fixed-factor-clock";
90 clock-div = <1>;
91 #clock-cells = <0>;
95 compatible = "fixed-factor-clock";
97 clock-div = <2>;
98 #clock-cells = <0>;
102 compatible = "fixed-factor-clock";
104 clock-div = <3>;
105 #clock-cells = <0>;
109 compatible = "fixed-factor-clock";
111 clock-div = <3>;
112 #clock-cells = <0>;
116 ftfe: flash-controller@40020000 {
117 compatible = "nxp,kinetis-ftfe";
120 interrupt-names = "command-complete", "read-collision";
123 #address-cells = <1>;
124 #size-cells = <1>;
127 compatible = "soc-nv-flash";
129 erase-block-size = <2048>;
130 write-block-size = <8>;
135 compatible = "nxp,kinetis-i2c";
136 clock-frequency = <I2C_BITRATE_STANDARD>;
137 #address-cells = <1>;
138 #size-cells = <0>;
146 compatible = "nxp,kinetis-i2c";
147 clock-frequency = <I2C_BITRATE_STANDARD>;
148 #address-cells = <1>;
149 #size-cells = <0>;
157 compatible = "nxp,kinetis-uart";
160 interrupt-names = "status", "error";
167 compatible = "nxp,kinetis-uart";
170 interrupt-names = "status", "error";
177 compatible = "nxp,kinetis-uart";
180 interrupt-names = "status", "error";
187 compatible = "nxp,kinetis-uart";
190 interrupt-names = "status", "error";
196 porta: pinmux@40049000 {
197 compatible = "nxp,port-pinmux";
202 portb: pinmux@4004a000 {
203 compatible = "nxp,port-pinmux";
208 portc: pinmux@4004b000 {
209 compatible = "nxp,port-pinmux";
214 portd: pinmux@4004c000 {
215 compatible = "nxp,port-pinmux";
220 porte: pinmux@4004d000 {
221 compatible = "nxp,port-pinmux";
227 compatible = "nxp,kinetis-gpio";
231 gpio-controller;
232 #gpio-cells = <2>;
233 nxp,kinetis-port = <&porta>;
237 compatible = "nxp,kinetis-gpio";
241 gpio-controller;
242 #gpio-cells = <2>;
243 nxp,kinetis-port = <&portb>;
247 compatible = "nxp,kinetis-gpio";
251 gpio-controller;
252 #gpio-cells = <2>;
253 nxp,kinetis-port = <&portc>;
257 compatible = "nxp,kinetis-gpio";
261 gpio-controller;
262 #gpio-cells = <2>;
263 nxp,kinetis-port = <&portd>;
267 compatible = "nxp,kinetis-gpio";
271 gpio-controller;
272 #gpio-cells = <2>;
273 nxp,kinetis-port = <&porte>;
281 #address-cells = <1>;
282 #size-cells = <0>;
291 #address-cells = <1>;
292 #size-cells = <0>;
297 compatible = "nxp,kinetis-wdog";
344 compatible = "nxp,kinetis-adc16";
348 #io-channel-cells = <1>;
352 compatible = "nxp,kinetis-dac";
355 voltage-reference = <1>;
357 #io-channel-cells = <1>;
361 compatible = "nxp,kinetis-dac";
364 voltage-reference = <1>;
366 #io-channel-cells = <1>;
370 compatible = "nxp,kinetis-usbd";
373 interrupt-names = "usb_otg";
374 num-bidir-endpoints = <16>;
379 compatible = "nxp,kinetis-rnga";
388 arm,num-irq-priority-bits = <4>;