Lines Matching +full:0 +full:x98
27 #size-cells = <0>;
29 cpu@0 {
32 reg = <0>;
38 * across the 0x2000_0000 boundary are not supported in the Arm
47 reg = <0x1fff0000 DT_SIZE_K(64)>;
53 reg = <0x20000000 DT_SIZE_K(64)>;
65 reg = <0x40064000 0xd>;
71 reg = <0x40065000 0x4>;
78 reg = <0x4003d000 0x808>;
84 reg = <0x40047000 0x1060>;
91 #clock-cells = <0>;
98 #clock-cells = <0>;
105 #clock-cells = <0>;
112 #clock-cells = <0>;
118 reg = <0x40020000 0x18>;
119 interrupts = <18 0>, <19 0>;
126 flash0: flash@0 {
128 reg = <0 DT_SIZE_M(1)>;
138 #size-cells = <0>;
139 reg = <0x40066000 0x1000>;
140 interrupts = <24 0>;
141 clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 6>;
149 #size-cells = <0>;
150 reg = <0x40067000 0x1000>;
151 interrupts = <25 0>;
152 clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 7>;
158 reg = <0x4006a000 0x1000>;
159 interrupts = <31 0>, <32 0>;
161 clocks = <&sim KINETIS_SIM_CORESYS_CLK 0x1034 10>;
168 reg = <0x4006b000 0x1000>;
169 interrupts = <33 0>, <34 0>;
171 clocks = <&sim KINETIS_SIM_CORESYS_CLK 0x1034 11>;
178 reg = <0x4006c000 0x1000>;
179 interrupts = <35 0>, <36 0>;
181 clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 12>;
188 reg = <0x4006d000 0x1000>;
189 interrupts = <37 0>, <38 0>;
191 clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 13>;
198 reg = <0x40049000 0xd0>;
199 clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>;
204 reg = <0x4004a000 0xd0>;
205 clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>;
210 reg = <0x4004b000 0xd0>;
211 clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>;
216 reg = <0x4004c000 0xd0>;
217 clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>;
222 reg = <0x4004d000 0xd0>;
223 clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>;
229 reg = <0x400ff000 0x40>;
239 reg = <0x400ff040 0x40>;
249 reg = <0x400ff080 0x40>;
259 reg = <0x400ff0c0 0x40>;
269 reg = <0x400ff100 0x40>;
278 reg = <0x4002c000 0x88>;
280 clocks = <&sim KINETIS_SIM_BUS_CLK 0x103C 12>;
282 #size-cells = <0>;
288 reg = <0x4002d000 0x88>;
290 clocks = <&sim KINETIS_SIM_BUS_CLK 0x103C 13>;
292 #size-cells = <0>;
298 reg = <0x40052000 16>;
299 interrupts = <22 0>;
300 clocks = <&sim KINETIS_SIM_LPO_CLK 0 0>;
305 reg = <0x40038000 0x98>;
306 interrupts = <42 0>;
308 <&sim KINETIS_SIM_BUS_CLK 0x103C 24>;
315 reg = <0x40039000 0x98>;
316 interrupts = <43 0>;
318 <&sim KINETIS_SIM_BUS_CLK 0x103C 25>;
325 reg = <0x4003a000 0x98>;
326 interrupts = <44 0>;
328 <&sim KINETIS_SIM_BUS_CLK 0x103C 26>;
335 reg = <0x400b9000 0x98>;
336 interrupts = <71 0>;
338 <&sim KINETIS_SIM_BUS_CLK 0x103C 6>;
345 reg = <0x4003b000 0x70>;
346 interrupts = <39 0>;
353 reg = <0x4003f000 0x1000>;
354 interrupts = <56 0>;
362 reg = <0x40028000 0x1000>;
363 interrupts = <72 0>;
371 reg = <0x40072000 0x1000>;
380 reg = <0x40029000 0x1000>;
382 interrupts = <23 0>;