Lines Matching +full:wui +full:- +full:maps
4 * SPDX-License-Identifier: Apache-2.0
8 #include "npcx7/npcx7-alts-map.dtsi"
9 /* NPCX7 series mapping table between MIWU wui bits and source device */
10 #include "npcx7/npcx7-miwus-wui-map.dtsi"
12 #include "npcx7/npcx7-miwus-int-map.dtsi"
14 #include "npcx7/npcx7-espi-vws-map.dtsi"
15 /* NPCX7 series low-voltage io controls mapping table */
16 #include "npcx7/npcx7-lvol-ctrl-map.dtsi"
24 cpu-power-states = <&suspend_to_idle0 &suspend_to_idle1>;
27 power-states {
28 suspend_to_idle0: suspend-to-idle0 {
29 compatible = "zephyr,power-state";
30 power-state-name = "suspend-to-idle";
31 substate-id = <0>;
32 min-residency-us = <1000>;
35 suspend_to_idle1: suspend-to-idle1 {
36 compatible = "zephyr,power-state";
37 power-state-name = "suspend-to-idle";
38 substate-id = <1>;
39 min-residency-us = <201000>;
44 def-io-conf-list {
82 compatible = "nuvoton,npcx7", "nuvoton,npcx", "simple-bus";
84 bbram: bb-ram@400af000 {
85 compatible = "nuvoton,npcx-bbram";
88 reg-names = "memory", "status";
93 compatible = "nuvoton,npcx-itim-timer";
96 reg-names = "evt_itim", "sys_itim";
103 compatible = "nuvoton,npcx-uart";
107 uart-rx = <&wui_cr_sin1>;
112 compatible = "nuvoton,npcx-uart";
116 uart-rx = <&wui_cr_sin2>;
121 pcc: clock-controller@4000d000 {
122 clock-frequency = <DT_FREQ_M(90)>; /* OFMCLK runs at 90MHz */
123 core-prescaler = <6>; /* CORE_CLK runs at 15MHz */
124 apb1-prescaler = <6>; /* APB1_CLK runs at 15MHz */
125 apb2-prescaler = <6>; /* APB2_CLK runs at 15MHz */
126 apb3-prescaler = <6>; /* APB3_CLK runs at 15MHz */
127 ram-pd-depth = <12>; /* Valid bit-depth of RAM_PDn reg */
128 pwdwn-ctl-val = <0xfb /* No FIU_PD */
137 /* Wake-up input source mapping for GPIOs in npcx7 series */
139 wui-maps = <&wui_io00 &wui_io01 &wui_io02 &wui_io03
142 lvol-maps = <&lvol_io00 &lvol_none &lvol_none &lvol_none
147 wui-maps = <&wui_io10 &wui_io11 &wui_none &wui_none
150 lvol-maps = <&lvol_none &lvol_none &lvol_none &lvol_none
155 wui-maps = <&wui_io20 &wui_io21 &wui_io22 &wui_io23
158 lvol-maps = <&lvol_none &lvol_none &lvol_none &lvol_none
163 wui-maps = <&wui_io30 &wui_io31 &wui_none &wui_io33
166 lvol-maps = <&lvol_none &lvol_none &lvol_none &lvol_io33
171 wui-maps = <&wui_io40 &wui_io41 &wui_io42 &wui_io43
174 lvol-maps = <&lvol_io40 &lvol_none &lvol_none &lvol_none
179 wui-maps = <&wui_io50 &wui_io51 &wui_io52 &wui_io53
182 lvol-maps = <&lvol_io50 &lvol_none &lvol_none &lvol_none
187 wui-maps = <&wui_io60 &wui_io61 &wui_io62 &wui_io63
190 lvol-maps = <&lvol_none &lvol_none &lvol_none &lvol_none
195 wui-maps = <&wui_io70 &wui_none &wui_io72 &wui_io73
198 lvol-maps = <&lvol_none &lvol_none &lvol_io72 &lvol_io73
203 wui-maps = <&wui_io80 &wui_io81 &wui_io82 &wui_io83
206 lvol-maps = <&lvol_io80 &lvol_none &lvol_io82 &lvol_none
211 wui-maps = <&wui_io90 &wui_io91 &wui_io92 &wui_io93
214 lvol-maps = <&lvol_io90 &lvol_io91 &lvol_io92 &lvol_none
219 wui-maps = <&wui_ioa0 &wui_ioa1 &wui_ioa2 &wui_ioa3
222 lvol-maps = <&lvol_none &lvol_none &lvol_none &lvol_none
227 wui-maps = <&wui_iob0 &wui_iob1 &wui_iob2 &wui_iob3
230 lvol-maps = <&lvol_none &lvol_none &lvol_iob2 &lvol_iob3
235 wui-maps = <&wui_ioc0 &wui_ioc1 &wui_ioc2 &wui_ioc3
238 lvol-maps = <&lvol_none &lvol_ioc1 &lvol_ioc2 &lvol_none
243 wui-maps = <&wui_iod0 &wui_iod1 &wui_iod2 &wui_iod3
246 lvol-maps = <&lvol_iod0 &lvol_iod1 &lvol_none &lvol_none
251 wui-maps = <&wui_ioe0 &wui_ioe1 &wui_ioe2 &wui_ioe3
254 lvol-maps = <&lvol_none &lvol_none &lvol_none &lvol_ioe3
259 wui-maps = <&wui_iof0 &wui_iof1 &wui_iof2 &wui_iof3
262 lvol-maps = <&lvol_none &lvol_none &lvol_iof2 &lvol_iof3
268 channel-count = <10>;
269 threshold-count = <3>;
278 compatible = "nuvoton,npcx-shi";
283 buffer-rx-size = <128>;
284 buffer-tx-size = <128>;
285 shi-cs-wui =<&wui_io53>;
289 rx-plsize = <64>;
290 tx-plsize = <16>;
293 rctl: reset-controller@400c3100 {
294 compatible = "nuvoton,npcx-rst";
296 #reset-cells = <1>;
301 soc-id {
302 chip-id = <0x07>;
303 revision-reg = <0x00007FFC 1>;
306 booter-variant {
307 hif-type-auto;