Lines Matching +full:0 +full:x40024000
27 #size-cells = <0>;
29 cpu@0 {
32 reg = <0>;
39 #clock-cells = <0>;
45 reg = <0x40000200 0x100>;
46 #clock-cells = <0>;
62 reg = <0x40000000 0x20>;
68 reg = <0x4000c000 0x1000>;
72 flash0: flash@0 {
81 reg = <0x40070000 0x1000>;
82 interrupts = <36 0>;
91 reg = <0x40071000 0x1000>;
92 interrupts = <37 0>;
101 reg = <0x40072000 0x1000>;
102 interrupts = <48 0>;
111 reg = <0x40073000 0x1000>;
112 interrupts = <49 0>;
121 reg = <0x40074000 0x1000>;
122 interrupts = <74 0>;
131 reg = <0x40075000 0x1000>;
132 interrupts = <75 0>;
141 reg = <0x40076000 0x1000>;
142 interrupts = <102 0>;
151 reg = <0x40077000 0x1000>;
152 interrupts = <103 0>;
161 reg = <0x40000080 0x20
162 0x40000500 0x80>;
170 reg = <0x40004000 0x40>;
171 clocks = <&pcc NUMAKER_GPA_MODULE 0 0>;
180 reg = <0x40004040 0x40>;
181 clocks = <&pcc NUMAKER_GPB_MODULE 0 0>;
190 reg = <0x40004080 0x40>;
191 clocks = <&pcc NUMAKER_GPC_MODULE 0 0>;
200 reg = <0x400040c0 0x40>;
201 clocks = <&pcc NUMAKER_GPD_MODULE 0 0>;
210 reg = <0x40004100 0x40>;
211 clocks = <&pcc NUMAKER_GPE_MODULE 0 0>;
220 reg = <0x40004140 0x40>;
221 clocks = <&pcc NUMAKER_GPF_MODULE 0 0>;
228 reg = <0x40061000 0x6c>;
229 interrupts = <23 0>;
231 clocks = <&pcc NUMAKER_SPI0_MODULE NUMAKER_CLK_CLKSEL2_SPI0SEL_HIRC 0>;
233 #size-cells = <0>;
239 reg = <0x40062000 0x6c>;
240 interrupts = <51 0>;
242 clocks = <&pcc NUMAKER_SPI1_MODULE NUMAKER_CLK_CLKSEL2_SPI1SEL_HIRC 0>;
244 #size-cells = <0>;
250 reg = <0x40063000 0x6c>;
251 interrupts = <52 0>;
253 clocks = <&pcc NUMAKER_SPI2_MODULE NUMAKER_CLK_CLKSEL3_SPI2SEL_HIRC 0>;
255 #size-cells = <0>;
261 reg = <0x40064000 0x6c>;
262 interrupts = <62 0>;
264 clocks = <&pcc NUMAKER_SPI3_MODULE NUMAKER_CLK_CLKSEL3_SPI3SEL_HIRC 0>;
266 #size-cells = <0>;
273 reg = <0x40080000 0x1000>;
274 interrupts = <38 0>;
276 clocks = <&pcc NUMAKER_I2C0_MODULE 0 0>;
279 #size-cells = <0>;
285 reg = <0x40081000 0x1000>;
286 interrupts = <39 0>;
288 clocks = <&pcc NUMAKER_I2C1_MODULE 0 0>;
291 #size-cells = <0>;
297 reg = <0x40082000 0x1000>;
298 interrupts = <82 0>;
300 clocks = <&pcc NUMAKER_I2C2_MODULE 0 0>;
303 #size-cells = <0>;
309 reg = <0x40083000 0x1000>;
310 interrupts = <83 0>;
312 clocks = <&pcc NUMAKER_I2C3_MODULE 0 0>;
315 #size-cells = <0>;
320 reg = <0x40043000 0xffc>;
321 interrupts = <42 0>;
333 reg = <0x40041000 0x138>;
334 interrupts = <6 0>;
336 clocks = <&pcc NUMAKER_RTC_MODULE 0 0>;
342 reg = <0x40058000 0x37c>;
343 interrupts = <25 0>, <26 0>, <27 0>;
347 clocks = <&pcc NUMAKER_EPWM0_MODULE NUMAKER_CLK_CLKSEL2_EPWM0SEL_PCLK0 0>;
354 reg = <0x40059000 0x37c>;
355 interrupts = <29 0>, <30 0>, <31 0>;
359 clocks = <&pcc NUMAKER_EPWM1_MODULE NUMAKER_CLK_CLKSEL2_EPWM1SEL_PCLK1 0>;
366 reg = <0x40020000 0x200>, <0x40020200 0x1800>;
368 interrupts = <112 0>, <113 0>;
374 bosch,mram-cfg = <0x0 12 10 3 3 3 3 3>;
380 reg = <0x40024000 0x200>, <0x40024200 0x1800>;
382 interrupts = <114 0>, <115 0>;
388 bosch,mram-cfg = <0x0 12 10 3 3 3 3 3>;
394 reg = <0x400c0000 0x1000>;
395 interrupts = <53 0>;
407 reg = <0x40096000 0x10>;
408 interrupts = <9 0>;
409 clocks = <&pcc NUMAKER_WWDT_MODULE NUMAKER_CLK_CLKSEL1_WWDTSEL_LIRC 0>;
415 reg = <0x400c6000 0x1000>,
416 <0x40043000 0x1000>,
417 <0x40050000 0x1000>;
419 interrupts = <108 0>;
424 clocks = <&pcc NUMAKER_UTCPD0_MODULE 0 0>,
425 <&pcc NUMAKER_TMR0_MODULE NUMAKER_CLK_CLKSEL1_TMR0SEL_HIRC 0>;