Lines Matching +full:0 +full:x40024000
17 #size-cells = <0>;
19 cpu@0 {
22 reg = <0>;
28 reg = <0xe0000000 0x1000>;
37 reg = <0x10000000 0x1000>;
44 reg = <0x10001000 0x1000>;
54 reg = <0x40000000 0x1000>;
55 interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>;
61 reg = <0x40000000 0x1000>;
62 interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>;
71 reg = <0x4000051c 0x1>;
79 reg = <0x40000520 0x1>;
85 reg = <0x40000578 0x1>;
93 reg = <0x40001000 0x1000>;
119 reg = <0x40002000 0x1000>;
134 #size-cells = <0>;
135 reg = <0x40003000 0x1000>;
152 #size-cells = <0>;
153 reg = <0x40003000 0x1000>;
170 #size-cells = <0>;
171 reg = <0x40004000 0x1000>;
188 #size-cells = <0>;
189 reg = <0x40004000 0x1000>;
198 reg = <0x40005000 0x1000>;
205 reg = <0x40006000 0x1000>;
208 instance = <0>;
213 reg = <0x40007000 0x1000>;
222 reg = <0x40008000 0x1000>;
226 prescaler = <0>;
232 reg = <0x40009000 0x1000>;
236 prescaler = <0>;
242 reg = <0x4000a000 0x1000>;
246 prescaler = <0>;
251 reg = <0x4000b000 0x1000>;
261 reg = <0x4000c000 0x1000>;
268 reg = <0x4000d000 0x1000>;
275 reg = <0x4000e000 0x1000>;
282 reg = <0x4000f000 0x1000>;
290 reg = <0x40010000 0x1000>;
297 reg = <0x40011000 0x1000>;
307 reg = <0x40012000 0x1000>;
318 reg = <0x40013000 0x1000>;
325 reg = <0x40014000 0x1000>;
332 reg = <0x40015000 0x1000>;
339 reg = <0x40016000 0x1000>;
346 reg = <0x40017000 0x1000>;
353 reg = <0x40018000 0x1000>;
360 reg = <0x40019000 0x1000>;
368 reg = <0x4001a000 0x1000>;
372 prescaler = <0>;
378 reg = <0x4001b000 0x1000>;
382 prescaler = <0>;
387 reg = <0x4001c000 0x1000>;
395 reg = <0x4001d000 0x1000>;
402 reg = <0x4001e000 0x1000>;
408 reg = <0x4001e000 0x1000>;
415 flash0: flash@0 {
424 reg = <0x4001f000 0x1000>;
430 reg = <0x40020000 0x1000>;
436 reg = <0x40021000 0x1000>;
444 reg = <0x40022000 0x1000>;
460 #size-cells = <0>;
461 reg = <0x40023000 0x1000>;
470 reg = <0x40024000 0x1000>;
481 #size-cells = <0>;
482 reg = <0x40025000 0x1000>;
489 reg = <0x40027000 0x1000>;
501 reg = <0x40028000 0x1000>;
509 #size-cells = <0>;
510 reg = <0x40029000 0x1000>, <0x12000000 0x8000000>;
518 reg = <0x4002d000 0x1000>;
527 #size-cells = <0>;
528 reg = <0x4002f000 0x1000>;
540 reg = <0x50000000 0x200
541 0x50000500 0x300>;
544 port = <0>;
551 reg = <0x50000300 0x200
552 0x50000800 0x300>;
562 reg = <0x5002a000 0x1000>, <0x5002b000 0x1000>;