Lines Matching +full:reg +full:- +full:io +full:- +full:width
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/adc/nrf-saadc-v2.h>
10 #include <zephyr/dt-bindings/regulator/nrf5x.h>
14 zephyr,bt-hci = &bt_hci_controller;
16 zephyr,flash-controller = &flash_controller;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-m4";
26 reg = <0>;
32 compatible = "nordic,nrf-ficr";
33 reg = <0x10000000 0x1000>;
34 #nordic,ficr-cells = <1>;
39 compatible = "nordic,nrf-uicr";
40 reg = <0x10001000 0x1000>;
45 compatible = "mmio-sram";
49 compatible = "nordic,nrf-clock";
50 reg = <0x40000000 0x1000>;
56 compatible = "nordic,nrf-power";
57 reg = <0x40000000 0x1000>;
60 #address-cells = <1>;
61 #size-cells = <1>;
64 #address-cells = <1>;
65 #size-cells = <1>;
66 compatible = "nordic,nrf-gpregret";
67 reg = <0x4000051c 0x1>;
72 #address-cells = <1>;
73 #size-cells = <1>;
74 compatible = "nordic,nrf-gpregret";
75 reg = <0x40000520 0x1>;
79 reg: regulator@40000578 { label
80 compatible = "nordic,nrf5x-regulator";
81 reg = <0x40000578 0x1>;
82 regulator-name = "REG";
83 regulator-initial-mode = <NRF5X_REG_MODE_LDO>;
88 compatible = "nordic,nrf-bprot";
89 reg = <0x40000000 0x1000>;
94 compatible = "nordic,nrf-radio";
95 reg = <0x40001000 0x1000>;
98 ble-2mbps-supported;
104 compatible = "zephyr,bt-hci-ll-sw-split";
111 /* compatible = "nordic,nrf-uarte" or "nordic,nrf-uart"; */
112 compatible = "nordic,nrf-uarte";
113 reg = <0x40002000 0x1000>;
122 * compatible = "nordic,nrf-twi" or
123 * "nordic,nrf-twim" or
124 * "nordic,nrf-twis".
126 compatible = "nordic,nrf-twim";
127 #address-cells = <1>;
128 #size-cells = <0>;
129 reg = <0x40003000 0x1000>;
131 easydma-maxcnt-bits = <14>;
133 zephyr,pm-device-runtime-auto;
140 * compatible = "nordic,nrf-spi" or
141 * "nordic,nrf-spim" or
142 * "nordic,nrf-spis".
144 compatible = "nordic,nrf-spim";
145 #address-cells = <1>;
146 #size-cells = <0>;
147 reg = <0x40004000 0x1000>;
149 max-frequency = <DT_FREQ_M(8)>;
150 easydma-maxcnt-bits = <14>;
155 compatible = "nordic,nrf-gpiote";
156 reg = <0x40006000 0x1000>;
163 compatible = "nordic,nrf-saadc";
164 reg = <0x40007000 0x1000>;
167 #io-channel-cells = <1>;
171 compatible = "nordic,nrf-timer";
173 reg = <0x40008000 0x1000>;
174 cc-num = <4>;
175 max-bit-width = <32>;
181 compatible = "nordic,nrf-timer";
183 reg = <0x40009000 0x1000>;
184 cc-num = <4>;
185 max-bit-width = <32>;
191 compatible = "nordic,nrf-timer";
193 reg = <0x4000a000 0x1000>;
194 cc-num = <4>;
195 max-bit-width = <32>;
201 compatible = "nordic,nrf-rtc";
202 reg = <0x4000b000 0x1000>;
203 cc-num = <3>;
206 clock-frequency = <32768>;
211 compatible = "nordic,nrf-temp";
212 reg = <0x4000c000 0x1000>;
218 compatible = "nordic,nrf-rng";
219 reg = <0x4000d000 0x1000>;
225 compatible = "nordic,nrf-ecb";
226 reg = <0x4000e000 0x1000>;
232 compatible = "nordic,nrf-ccm";
233 reg = <0x4000f000 0x1000>;
235 length-field-length-8-bits;
240 compatible = "nordic,nrf-wdt";
241 reg = <0x40010000 0x1000>;
247 compatible = "nordic,nrf-rtc";
248 reg = <0x40011000 0x1000>;
249 cc-num = <4>;
252 clock-frequency = <32768>;
257 compatible = "nordic,nrf-qdec";
258 reg = <0x40012000 0x1000>;
264 compatible = "nordic,nrf-egu", "nordic,nrf-swi";
265 reg = <0x40014000 0x1000>;
271 compatible = "nordic,nrf-egu", "nordic,nrf-swi";
272 reg = <0x40015000 0x1000>;
278 compatible = "nordic,nrf-swi";
279 reg = <0x40016000 0x1000>;
285 compatible = "nordic,nrf-swi";
286 reg = <0x40017000 0x1000>;
292 compatible = "nordic,nrf-swi";
293 reg = <0x40018000 0x1000>;
299 compatible = "nordic,nrf-swi";
300 reg = <0x40019000 0x1000>;
305 flash_controller: flash-controller@4001e000 {
306 compatible = "nordic,nrf52-flash-controller";
307 reg = <0x4001e000 0x1000>;
308 partial-erase;
310 #address-cells = <1>;
311 #size-cells = <1>;
315 compatible = "soc-nv-flash";
316 erase-block-size = <4096>;
317 write-block-size = <4>;
322 compatible = "nordic,nrf-ppi";
323 reg = <0x4001f000 0x1000>;
328 compatible = "nordic,nrf-gpio";
329 gpio-controller;
330 reg = <0x50000000 0x1000>;
331 #gpio-cells = <2>;
334 gpiote-instance = <&gpiote>;
340 arm,num-irq-priority-bits = <3>;