Lines Matching +full:0 +full:x04
17 #size-cells = <0>;
19 cpu0: cpu@0 {
22 reg = <0>;
42 reg = <0x000E0000 0x38000>;
47 reg = <0x00118000 0x8000>;
51 i2c-smb-0 = &i2c_smb_0;
61 reg = <0x4000fc00 0x200>;
65 reg = <0x40080100 0x100 0x4000a400 0x100>;
80 reg = <0x4000e000 0x400>;
85 reg = <0x12c 0x14>;
86 interrupts = <14 0>;
88 sources = <0 1 2 4 5 10 16 17>;
96 reg = <0x40081000 0x1000>;
100 reg = < 0x40081000 0x80 0x40081300 0x04
101 0x40081380 0x04 0x400813fc 0x04>;
104 port-id = <0>;
110 reg = < 0x40081080 0x80 0x40081304 0x04
111 0x40081384 0x04 0x400813f8 0x4>;
120 reg = < 0x40081100 0x80 0x40081308 0x04
121 0x40081388 0x04 0x400813f4 0x04>;
130 reg = < 0x40081180 0x80 0x4008130c 0x04
131 0x4008138c 0x04 0x400813f0 0x04>;
133 interrupts = <0 2>;
140 reg = < 0x40081200 0x80 0x40081310 0x04
141 0x40081390 0x04 0x400813ec 0x04>;
150 reg = < 0x40081280 0x80 0x40081314 0x04
151 0x40081394 0x04 0x400813e8 0x04>;
161 reg = <0x40007400 0x10>;
162 interrupts = <111 0>;
167 reg = <0x4000a800 0x80>;
172 reg = <0x40000400 0x400>;
173 interrupts = <171 0>;
179 reg = <0x400f2400 0x400>;
180 interrupts = <40 0>;
183 girqs = <15 0>;
190 reg = <0x400f2800 0x400>;
191 interrupts = <41 0>;
201 reg = <0x400f2c00 0x400>;
202 interrupts = <44 0>;
213 reg = <0x40004000 0x80>;
218 #size-cells = <0>;
221 girq-bit = <0>;
226 reg = <0x40004400 0x80>;
231 #size-cells = <0>;
239 reg = <0x40004800 0x80>;
244 #size-cells = <0>;
252 reg = <0x40004C00 0x80>;
257 #size-cells = <0>;
265 reg = <0x40005000 0x80>;
270 #size-cells = <0>;
278 reg = <0x400f3400 0x400>;
281 #size-cells = <0>;
286 reg = < 0x40008000 0x400
287 0x40070000 0x400
288 0x40071000 0x400>;
290 #size-cells = <0>;
297 reg = <0x40000c00 0x20>;
298 interrupts = <136 0>;
299 max-value = <0xFFFF>;
300 prescaler = <0>;
302 girqs = <23 0>;
308 reg = <0x40000c20 0x20>;
309 interrupts = <137 0>;
310 max-value = <0xFFFF>;
311 prescaler = <0>;
325 reg = <0x40000c80 0x20>;
326 interrupts = <140 0>;
327 max-value = <0xFFFFFFFF>;
328 prescaler = <0>;
336 reg = <0x40000ca0 0x20>;
337 interrupts = <141 0>;
338 max-value = <0xFFFFFFFF>;
339 prescaler = <0>;
344 reg = <0x40009800 0x20>;
345 interrupts = <112 0>;
349 reg = <0x40009820 0x20>;
350 interrupts = <113 0>;
355 reg = <0x40009000 0x40>;
360 #size-cells = <0>;
365 reg = <0x40009040 0x40>;
370 #size-cells = <0>;
375 reg = <0x40005800 0x20>;
382 reg = <0x40005810 0x20>;
389 reg = <0x40005820 0x20>;
396 reg = <0x40005830 0x20>;
403 reg = <0x40005840 0x20>;
410 reg = <0x40005850 0x20>;
417 reg = <0x40005860 0x20>;
424 reg = <0x40005870 0x20>;
431 reg = <0x40005880 0x20>;
438 reg = <0x40007c00 0x90>;
439 interrupts = <78 0>, <79 0>;
449 reg = <0x40009c00 0x18>;
450 interrupts = <135 0>;
455 #size-cells = <0>;
459 reg = <0x40006400 0x80>;
461 girqs = <17 0>;
464 #size-cells = <0>;
468 reg = <0x40070000 0x400>;
474 chip_select = <0>;
480 #size-cells = <0>;
485 reg = <0x40006000 0x10>;
491 #size-cells = <0>;
495 reg = <0x40006010 0x10>;
501 #size-cells = <0>;
505 reg = <0x40006020 0x10>;
511 #size-cells = <0>;
515 reg = <0x40006030 0x10>;
521 #size-cells = <0>;
524 reg = <0x4000b800 0x100>;
525 interrupts = <83 0>;
531 reg = <0x4000b900 0x100>;
532 interrupts = <84 0>;
538 reg = <0x4000ba00 0x100>;
539 interrupts = <85 0>;