Lines Matching +full:num +full:- +full:channels
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
8 #include <zephyr/dt-bindings/adc/adc.h>
9 #include <zephyr/dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/pwm/pwm.h>
12 #include <zephyr/dt-bindings/clock/gd32f4xx-clocks.h>
13 #include <zephyr/dt-bindings/reset/gd32f4xx.h>
17 #address-cells = <1>;
18 #size-cells = <0>;
21 compatible = "arm,cortex-m4f";
23 #address-cells = <1>;
24 #size-cells = <1>;
27 compatible = "arm,armv7m-mpu";
35 compatible = "mmio-sram";
39 rcu: reset-clock-controller@40023800 {
40 compatible = "gd,gd32-rcu";
44 cctl: clock-controller {
45 compatible = "gd,gd32-cctl";
46 #clock-cells = <1>;
50 rctl: reset-controller {
51 compatible = "gd,gd32-rctl";
52 #reset-cells = <1>;
57 fmc: flash-controller@40023c00 {
58 compatible = "gd,gd32-flash-controller";
61 #address-cells = <1>;
62 #size-cells = <1>;
65 compatible = "gd,gd32-nv-flash-v3", "soc-nv-flash";
66 write-block-size = <2>;
67 max-erase-time-ms = <8000>;
72 compatible = "gd,gd32-usart";
81 compatible = "gd,gd32-usart";
90 compatible = "gd,gd32-usart";
99 compatible = "gd,gd32-usart";
108 compatible = "gd,gd32-usart";
117 compatible = "gd,gd32-usart";
126 compatible = "gd,gd32-usart";
135 compatible = "gd,gd32-usart";
144 compatible = "gd,gd32-dac";
148 num-channels = <2>;
150 #io-channel-cells = <1>;
154 compatible = "gd,gd32-i2c";
156 #address-cells = <1>;
157 #size-cells = <0>;
158 clock-frequency = <I2C_BITRATE_STANDARD>;
160 interrupt-names = "event", "error";
167 compatible = "gd,gd32-i2c";
169 #address-cells = <1>;
170 #size-cells = <0>;
171 clock-frequency = <I2C_BITRATE_STANDARD>;
173 interrupt-names = "event", "error";
180 compatible = "gd,gd32-i2c";
182 #address-cells = <1>;
183 #size-cells = <0>;
184 clock-frequency = <I2C_BITRATE_STANDARD>;
186 interrupt-names = "event", "error";
193 compatible = "gd,gd32-spi";
199 #address-cells = <1>;
200 #size-cells = <0>;
204 compatible = "gd,gd32-spi";
210 #address-cells = <1>;
211 #size-cells = <0>;
215 compatible = "gd,gd32-spi";
221 #address-cells = <1>;
222 #size-cells = <0>;
226 compatible = "gd,gd32-adc";
231 channels = <16>;
233 #io-channel-cells = <1>;
237 compatible = "gd,gd32-adc";
242 channels = <16>;
244 #io-channel-cells = <1>;
248 compatible = "gd,gd32-adc";
253 channels = <16>;
255 #io-channel-cells = <1>;
259 compatible = "gd,gd32-syscfg";
264 exti: interrupt-controller@40013c00 {
265 compatible = "gd,gd32-exti";
266 interrupt-controller;
267 #interrupt-cells = <1>;
269 num-lines = <23>;
272 interrupt-names = "line0", "line1", "line2", "line3",
273 "line4", "line5-9", "line10-15";
278 compatible = "gd,gd32-fwdgt";
284 compatible = "gd,gd32-wwdgt";
292 pinctrl: pin-controller@40020000 {
293 compatible = "gd,gd32-pinctrl-af";
295 #address-cells = <1>;
296 #size-cells = <1>;
300 compatible = "gd,gd32-gpio";
301 gpio-controller;
302 #gpio-cells = <2>;
310 compatible = "gd,gd32-gpio";
311 gpio-controller;
312 #gpio-cells = <2>;
320 compatible = "gd,gd32-gpio";
321 gpio-controller;
322 #gpio-cells = <2>;
330 compatible = "gd,gd32-gpio";
331 gpio-controller;
332 #gpio-cells = <2>;
340 compatible = "gd,gd32-gpio";
341 gpio-controller;
342 #gpio-cells = <2>;
350 compatible = "gd,gd32-gpio";
351 gpio-controller;
352 #gpio-cells = <2>;
360 compatible = "gd,gd32-gpio";
361 gpio-controller;
362 #gpio-cells = <2>;
370 compatible = "gd,gd32-gpio";
371 gpio-controller;
372 #gpio-cells = <2>;
380 compatible = "gd,gd32-gpio";
381 gpio-controller;
382 #gpio-cells = <2>;
391 compatible = "gd,gd32-timer";
394 interrupt-names = "brk", "up", "trgcom", "cc";
397 is-advanced;
398 channels = <4>;
402 compatible = "gd,gd32-pwm";
404 #pwm-cells = <3>;
409 compatible = "gd,gd32-timer";
412 interrupt-names = "global";
415 is-32bit;
416 channels = <4>;
420 compatible = "gd,gd32-pwm";
422 #pwm-cells = <3>;
427 compatible = "gd,gd32-timer";
430 interrupt-names = "global";
433 channels = <4>;
437 compatible = "gd,gd32-pwm";
439 #pwm-cells = <3>;
444 compatible = "gd,gd32-timer";
447 interrupt-names = "global";
450 channels = <4>;
454 compatible = "gd,gd32-pwm";
456 #pwm-cells = <3>;
461 compatible = "gd,gd32-timer";
464 interrupt-names = "global";
467 is-32bit;
468 channels = <4>;
472 compatible = "gd,gd32-pwm";
474 #pwm-cells = <3>;
479 compatible = "gd,gd32-timer";
482 interrupt-names = "global";
485 channels = <0>;
490 compatible = "gd,gd32-timer";
493 interrupt-names = "global";
496 channels = <0>;
501 compatible = "gd,gd32-timer";
504 interrupt-names = "brk", "up", "trgcom", "cc";
507 is-advanced;
508 channels = <4>;
512 compatible = "gd,gd32-pwm";
514 #pwm-cells = <3>;
519 compatible = "gd,gd32-timer";
522 interrupt-names = "global";
525 channels = <2>;
529 compatible = "gd,gd32-pwm";
531 #pwm-cells = <3>;
536 compatible = "gd,gd32-timer";
539 interrupt-names = "global";
542 channels = <1>;
546 compatible = "gd,gd32-pwm";
548 #pwm-cells = <3>;
553 compatible = "gd,gd32-timer";
556 interrupt-names = "global";
559 channels = <1>;
563 compatible = "gd,gd32-pwm";
565 #pwm-cells = <3>;
570 compatible = "gd,gd32-timer";
573 interrupt-names = "global";
576 channels = <2>;
580 compatible = "gd,gd32-pwm";
582 #pwm-cells = <3>;
587 compatible = "gd,gd32-timer";
590 interrupt-names = "global";
593 channels = <1>;
597 compatible = "gd,gd32-pwm";
599 #pwm-cells = <3>;
604 compatible = "gd,gd32-timer";
607 interrupt-names = "global";
610 channels = <1>;
614 compatible = "gd,gd32-pwm";
616 #pwm-cells = <3>;
621 compatible = "gd,gd32-dma-v1";
627 dma-channels = <8>;
629 #dma-cells = <4>;
634 compatible = "gd,gd32-dma-v1";
640 dma-channels = <8>;
642 #dma-cells = <4>;
649 arm,num-irq-priority-bits = <4>;