Lines Matching full:cctl
45 cctl: clock-controller { label
46 compatible = "gd,gd32-cctl";
77 clocks = <&cctl GD32_CLOCK_USART0>;
86 clocks = <&cctl GD32_CLOCK_USART1>;
95 clocks = <&cctl GD32_CLOCK_USART2>;
104 clocks = <&cctl GD32_CLOCK_UART3>;
113 clocks = <&cctl GD32_CLOCK_UART4>;
122 clocks = <&cctl GD32_CLOCK_SPI0>;
133 clocks = <&cctl GD32_CLOCK_SPI1>;
144 clocks = <&cctl GD32_CLOCK_SPI2>;
155 clocks = <&cctl GD32_CLOCK_ADC0>;
166 clocks = <&cctl GD32_CLOCK_ADC1>;
177 clocks = <&cctl GD32_CLOCK_ADC2>;
201 clocks = <&cctl GD32_CLOCK_AFIO>;
214 clocks = <&cctl GD32_CLOCK_WWDGT>;
232 clocks = <&cctl GD32_CLOCK_GPIOA>;
242 clocks = <&cctl GD32_CLOCK_GPIOB>;
252 clocks = <&cctl GD32_CLOCK_GPIOC>;
262 clocks = <&cctl GD32_CLOCK_GPIOD>;
272 clocks = <&cctl GD32_CLOCK_GPIOE>;
282 clocks = <&cctl GD32_CLOCK_GPIOF>;
292 clocks = <&cctl GD32_CLOCK_GPIOG>;
303 clocks = <&cctl GD32_CLOCK_TIMER0>;
321 clocks = <&cctl GD32_CLOCK_TIMER2>;
338 clocks = <&cctl GD32_CLOCK_TIMER3>;
355 clocks = <&cctl GD32_CLOCK_TIMER5>;
366 clocks = <&cctl GD32_CLOCK_TIMER6>;
377 clocks = <&cctl GD32_CLOCK_TIMER7>;
395 clocks = <&cctl GD32_CLOCK_TIMER8>;
412 clocks = <&cctl GD32_CLOCK_TIMER9>;
429 clocks = <&cctl GD32_CLOCK_TIMER10>;
446 clocks = <&cctl GD32_CLOCK_TIMER11>;
463 clocks = <&cctl GD32_CLOCK_TIMER12>;
480 clocks = <&cctl GD32_CLOCK_TIMER13>;
497 clocks = <&cctl GD32_CLOCK_DMA0>;
509 clocks = <&cctl GD32_CLOCK_DMA1>;