Lines Matching full:cctl
39 cctl: clock-controller { label
40 compatible = "gd,gd32-cctl";
83 clocks = <&cctl GD32_CLOCK_USART0>;
92 clocks = <&cctl GD32_CLOCK_USART1>;
101 clocks = <&cctl GD32_CLOCK_USART2>;
110 clocks = <&cctl GD32_CLOCK_UART3>;
119 clocks = <&cctl GD32_CLOCK_UART4>;
129 clocks = <&cctl GD32_CLOCK_USART5>;
137 clocks = <&cctl GD32_CLOCK_DAC>;
152 clocks = <&cctl GD32_CLOCK_I2C0>;
165 clocks = <&cctl GD32_CLOCK_I2C1>;
178 clocks = <&cctl GD32_CLOCK_I2C2>;
199 clocks = <&cctl GD32_CLOCK_AFIO>;
212 clocks = <&cctl GD32_CLOCK_WWDGT>;
230 clocks = <&cctl GD32_CLOCK_GPIOA>;
240 clocks = <&cctl GD32_CLOCK_GPIOB>;
250 clocks = <&cctl GD32_CLOCK_GPIOC>;
260 clocks = <&cctl GD32_CLOCK_GPIOD>;
270 clocks = <&cctl GD32_CLOCK_GPIOE>;
280 clocks = <&cctl GD32_CLOCK_GPIOF>;
290 clocks = <&cctl GD32_CLOCK_GPIOG>;
301 clocks = <&cctl GD32_CLOCK_TIMER0>;
319 clocks = <&cctl GD32_CLOCK_TIMER1>;
337 clocks = <&cctl GD32_CLOCK_TIMER2>;
354 clocks = <&cctl GD32_CLOCK_TIMER3>;
371 clocks = <&cctl GD32_CLOCK_TIMER4>;
389 clocks = <&cctl GD32_CLOCK_TIMER5>;
400 clocks = <&cctl GD32_CLOCK_TIMER6>;
411 clocks = <&cctl GD32_CLOCK_DMA0>;
423 clocks = <&cctl GD32_CLOCK_DMA1>;