Lines Matching full:rctl
51 rctl: reset-controller { label
52 compatible = "gd,gd32-rctl";
79 resets = <&rctl GD32_RESET_USART0>;
88 resets = <&rctl GD32_RESET_USART1>;
97 resets = <&rctl GD32_RESET_USART2>;
105 resets = <&rctl GD32_RESET_DAC>;
120 resets = <&rctl GD32_RESET_I2C0>;
133 resets = <&rctl GD32_RESET_I2C1>;
142 resets = <&rctl GD32_RESET_SPI0>;
153 resets = <&rctl GD32_RESET_SPI1>;
164 resets = <&rctl GD32_RESET_ADC0>;
175 resets = <&rctl GD32_RESET_ADC1>;
210 resets = <&rctl GD32_RESET_WWDGT>;
228 resets = <&rctl GD32_RESET_GPIOA>;
238 resets = <&rctl GD32_RESET_GPIOB>;
248 resets = <&rctl GD32_RESET_GPIOC>;
258 resets = <&rctl GD32_RESET_GPIOD>;
268 resets = <&rctl GD32_RESET_GPIOE>;
278 resets = <&rctl GD32_RESET_GPIOF>;
289 resets = <&rctl GD32_RESET_TIMER0>;
307 resets = <&rctl GD32_RESET_TIMER1>;
325 resets = <&rctl GD32_RESET_TIMER5>;
336 resets = <&rctl GD32_RESET_TIMER6>;
347 resets = <&rctl GD32_RESET_TIMER7>;
365 resets = <&rctl GD32_RESET_TIMER19>;
382 resets = <&rctl GD32_RESET_TIMER20>;