Lines Matching +full:mmio +full:- +full:sram
2 * Copyright (c) 2023-2024 Analog Devices, Inc.
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
11 clock-frequency = <DT_FREQ_M(96)>;
15 /delete-property/ clock-source;
19 /delete-property/ clock-source;
23 /delete-property/ clock-source;
30 compatible = "mmio-sram";
35 compatible = "mmio-sram";
40 compatible = "mmio-sram";
45 compatible = "mmio-sram";
50 compatible = "mmio-sram";
55 compatible = "mmio-sram";
60 compatible = "mmio-sram";
65 compatible = "mmio-sram";
70 compatible = "mmio-sram";
75 compatible = "mmio-sram";
80 compatible = "mmio-sram";
85 compatible = "adi,max32-flash-controller";
88 #address-cells = <1>;
89 #size-cells = <1>;
93 compatible = "soc-nv-flash";
95 write-block-size = <16>;
96 erase-block-size = <8192>;
101 compatible = "adi,max32-dma";
105 dma-channels = <8>;
107 #dma-cells = <2>;
111 compatible = "adi,max32-dma";
115 dma-channels = <8>;
117 #dma-cells = <2>;
121 compatible = "adi,max32-spi";
123 #address-cells = <1>;
124 #size-cells = <0>;
131 compatible = "adi,max32-spi";
133 #address-cells = <1>;
134 #size-cells = <0>;
141 compatible = "adi,max32-spi";
143 #address-cells = <1>;
144 #size-cells = <0>;
151 compatible = "adi,max32-timer";
156 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
161 compatible = "adi,max32-timer";
166 clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
171 compatible = "adi,max32-w1";