Lines Matching +full:- +full:bit

3  * SPDX-License-Identifier: Apache-2.0
14 #include<zephyr/dt-bindings/usb-c/nxp_nx20p3483.h>
16 /** Register address - device id */
18 /** Bit mask for vendor id */
20 /** Bit mask for version id */
23 /** Register address - device status */
25 /** Bit mask for device mode */
30 /** Value for high-voltage sink mode */
34 /** Value for high-voltage source mode */
39 /** Register address - switch control */
41 /** Bit field for source path selection. If set, HV source path is selected, 5V otherwise. */
42 #define NX20P3483_REG_SWITCH_CTRL_SRC   BIT(7)
44 /** Register address - switch status */
46 /** Bit field for 5V source switch enabled */
47 #define NX20P3483_REG_SWITCH_STATUS_5VSRC         BIT(2)
48 /** Bit field for HV source switch enabled */
49 #define NX20P3483_REG_SWITCH_STATUS_HVSRC         BIT(1)
50 /** Bit field for HV sink switch enabled */
51 #define NX20P3483_REG_SWITCH_STATUS_HVSNK         BIT(0)
53 /** Register address - interrupt1 */
55 /** Bit field for exit dead battery error */
56 #define NX20P3483_REG_INT1_DBEXIT_ERR BIT(7)
57 /** Bit field for overvoltage fault triggered on 5V source path */
58 #define NX20P3483_REG_INT1_OV_5VSRC   BIT(4)
59 /** Bit field for reverse current fault triggered on 5V source path */
60 #define NX20P3483_REG_INT1_RCP_5VSRC  BIT(3)
61 /** Bit field for short circuit fault triggered on 5V source path */
62 #define NX20P3483_REG_INT1_SC_5VSRC   BIT(2)
63 /** Bit field for overcurrent fault triggered on 5V source path */
64 #define NX20P3483_REG_INT1_OC_5VSRC   BIT(1)
65 /** Bit field for over temperature protection fault triggered */
66 #define NX20P3483_REG_INT1_OTP        BIT(0)
68 /** Register address - interrupt2*/
70 /** Bit field for sink and source routes enabled fault */
71 #define NX20P3483_REG_INT2_EN_ERR    BIT(7)
72 /** Bit field for reverse current fault triggered on HV sink path */
73 #define NX20P3483_REG_INT2_RCP_HVSNK BIT(6)
74 /** Bit field for short circuit fault triggered on HV sink path */
75 #define NX20P3483_REG_INT2_SC_HVSNK  BIT(5)
76 /** Bit field for overvoltage fault triggered on HV sink path */
77 #define NX20P3483_REG_INT2_OV_HVSNK  BIT(4)
78 /** Bit field for reverse current fault triggered on HV source path */
79 #define NX20P3483_REG_INT2_RCP_HVSRC BIT(3)
80 /** Bit field for short circuit fault triggered on HV source path */
81 #define NX20P3483_REG_INT2_SC_HVSRC  BIT(2)
82 /** Bit field for overcurrent fault triggered on HV source path */
83 #define NX20P3483_REG_INT2_OC_HVSRC  BIT(1)
84 /** Bit field for overvoltage fault triggered on HV source path */
85 #define NX20P3483_REG_INT2_OV_HVSRC  BIT(0)
87 /** Register address - interrupt1 mask */
90 /** Register address - interrupt2 mask*/
93 /** Register address - OVLO threshold (overvoltage threshold) */
96  * Bit mask for overvoltage threshold value
105  * Register address - HV source switch OCP threshold
111  * Register address - 5V source switch OCP threshold
116 /** Register address - device control */
118 /** Bit field for fast role swap capability activated */
119 #define NX20P3483_REG_DEVICE_CTRL_FRS_AT     BIT(3)
120 /** Bit field for exit dead battery mode */
121 #define NX20P3483_REG_DEVICE_CTRL_DB_EXIT    BIT(2)
122 /** Bit field for VBUS discharge circuit enabled */
123 #define NX20P3483_REG_DEVICE_CTRL_VBUSDIS_EN BIT(1)
124 /** Bit field for LDO shutdown */
125 #define NX20P3483_REG_DEVICE_CTRL_LDO_SD     BIT(0)