Lines Matching +full:bit +full:- +full:per +full:- +full:seconds
5 * SPDX-License-Identifier: Apache-2.0
54 * - system clock based on an LPTIM instance, clocked by LSI or LSE
55 * - prescaler is set to a 2^value from 1 (division of the LPTIM source clock by 1)
57 * - using LPTIM AutoReload capability to trig the IRQ (timeout irq)
58 * - when timeout irq occurs the counter is already reset
59 * - the maximum timeout duration is reached with the lptim_time_base value
60 * - with prescaler of 1, the max timeout (LPTIM_TIMEBASE) is 2 seconds:
62 * - with prescaler of 128, the max timeout (LPTIM_TIMEBASE) is 256 seconds:
74 /* A 32bit value cannot exceed 0xFFFFFFFF/LPTIM_TIMEBASE counting cycles.
88 (COND_CODE_1(CONFIG_SMP, (arch_curr_cpu()->id), (_current_cpu->id)))
150 /* announce the elapsed time in ms (count register is 16bit) */ in lptim_irq_handler()
212 if (next->state == PM_STATE_SUSPEND_TO_RAM) { in sys_clock_set_timeout()
217 if ((next->state == PM_STATE_SUSPEND_TO_IDLE) && (next->substate_id == 4)) { in sys_clock_set_timeout()
235 * Needed rump-up/setting time, lower accurency etc. should be in sys_clock_set_timeout()
236 * included in the exit-latency in the power state definition. in sys_clock_set_timeout()
259 * When CONFIG_SYSTEM_CLOCK_SLOPPY_IDLE = y, ticks equals to -1 in sys_clock_set_timeout()
268 * is treated as a maximum possible value LPTIM_MAX_TIMEBASE (16bit counter) in sys_clock_set_timeout()
282 ticks = CLAMP(ticks - 1, 1, lptim_time_base); in sys_clock_set_timeout()
286 /* read current counter value (cannot exceed 16bit) */ in sys_clock_set_timeout()
293 || ((autoreload - lp_time) < LPTIM_GUARD_VALUE)) { in sys_clock_set_timeout()
301 /* calculate the next arr value (cannot exceed 16bit) in sys_clock_set_timeout()
324 next_arr = next_arr - 1; in sys_clock_set_timeout()
337 /* In case of counter roll-over, add the autoreload value, in sys_clock_lp_time_get()
390 /* convert in hw cycles (keeping 32bit value) */ in sys_clock_cycle_get_32()
394 /* Wait for the IER register of the stm32U5 ready, after any bit write operation */
412 return -ENODEV; in sys_clock_driver_init()
418 return -EIO; in sys_clock_driver_init()
430 return -EIO; in sys_clock_driver_init()
438 return -EIO; in sys_clock_driver_init()
461 return -EIO; in sys_clock_driver_init()
466 * seconds at lptim_clock_freq divided lptim_clock_presc) Hz", in sys_clock_driver_init()
479 return -EIO; in sys_clock_driver_init()
543 /* LPTIM interrupt set-up before enabling */ in sys_clock_driver_init()
554 /* ARROK bit validates the write operation to ARR register */ in sys_clock_driver_init()
571 /* nb of LPTIM counter unit per kernel tick (depends on lptim clock prescaler) */ in sys_clock_driver_init()
574 lptim_set_autoreload(count_per_tick - 1); in sys_clock_driver_init()
621 (counter_get_top_value(stdby_timer) - stdby_timer_pre_stdby) + in sys_clock_idle_exit()
625 stdby_timer_diff = stdby_timer_post - stdby_timer_pre_stdby; in sys_clock_idle_exit()