94 static uint32_t cached_icr = CYCLES_PER_TICK;  variable
113 		ccr = cached_icr;  in rtimer_count()
150 		cached_icr = RTIMER_STOPPED;  in sys_clock_set_timeout()
174 	temp += (cached_icr - ccr);  in sys_clock_set_timeout()
179 	cached_icr = full_cycles + partial_cycles;  in sys_clock_set_timeout()
181 	temp = cached_icr;  in sys_clock_set_timeout()
212 	ticks += cached_icr - ccr;  in sys_clock_elapsed()
235 	cycles = cached_icr;  in mec5_ktimer_isr()
236 	cached_icr = MAX_TICKS * CYCLES_PER_TICK;  in mec5_ktimer_isr()
263 	mec_hal_rtimer_stop_and_load(rtimer, cached_icr, RTIMER_START_VAL);  in mec5_ktimer_isr()
297 	ret = (total_cycles + (cached_icr - ccr)) & RTIMER_COUNT_MASK;  in sys_clock_cycle_get_32()
306 	if (cached_icr == RTIMER_STOPPED) {  in sys_clock_idle_exit()
307 		cached_icr = CYCLES_PER_TICK;  in sys_clock_idle_exit()
308 		mec_hal_rtimer_stop_and_load(rtimer, cached_icr, RTIMER_START_VAL);  in sys_clock_idle_exit()
385 	cached_icr = MAX_TICKS;  in sys_clock_driver_init()
388 	mec_hal_rtimer_init(rtimer, rtmr_cfg, cached_icr);  in sys_clock_driver_init()