3  * SPDX-License-Identifier: Apache-2.0
58 /* Mask off bits[31:28] of 32-bit count */
63 /* Adjust cycle count programmed into timer for HW restart latency */
98  * has been reloaded within 1 32KHz clock of reading its count register.
103  * was on. We detect the timer is in the load state by checking the read-only
104  * count register and the START bit in the control register. If count register
106  * process of moving the preload register value into the count register.
130  * RTMR counter register is read-only and is loaded from the preload
131  * register by a 0->1 transition of the control register start bit.
132  * Writing a new value to preload only takes effect once the count
135 void sys_clock_set_timeout(int32_t n, bool idle)  in sys_clock_set_timeout()  argument
137 	ARG_UNUSED(idle);  in sys_clock_set_timeout()
144 	if (idle && (n == K_TICKS_FOREVER)) {  in sys_clock_set_timeout()
147 		 * global objects safe from pre-emption?  in sys_clock_set_timeout()
157 		full_ticks = MAX_TICKS - 1;  in sys_clock_set_timeout()
159 		full_ticks = n - 1;  in sys_clock_set_timeout()
174 	temp += (cached_icr - ccr);  in sys_clock_set_timeout()
178 	partial_cycles = CYCLES_PER_TICK - (total_cycles % CYCLES_PER_TICK);  in sys_clock_set_timeout()
183 		temp -= RTIMER_ADJUST_CYCLES;  in sys_clock_set_timeout()
207 	elapsed = (int32_t)total_cycles - (int32_t)last_announcement;  in sys_clock_elapsed()
209 		elapsed = -1 * elapsed;  in sys_clock_elapsed()
212 	ticks += cached_icr - ccr;  in sys_clock_elapsed()
241 	/* handle wrap by using (power of 2) - 1 mask */  in mec5_ktimer_isr()
242 	ticks = total_cycles - last_announcement;  in mec5_ktimer_isr()
253 /* Non-tickless kernel build. */
282  * 1. Kernel call to k_cycle_get_32() -> arch_k_cycle_get_32() -> here.
297 	ret = (total_cycles + (cached_icr - ccr)) & RTIMER_COUNT_MASK;  in sys_clock_cycle_get_32()
319  * 32-bit basic timer divided down to 1 MHz. Basic timer configured
320  * for count up, auto-reload, and no interrupt mode.
333 		if ((curr - start) >= usec_to_wait) {  in arch_busy_wait()
347 	uint32_t count = 0;  in config_custom_busy_wait()  local
349 	mec_hal_btimer_init(btimer, MEC5_BTIMER_FDIV, count, bflags);  in config_custom_busy_wait()