110 static inline void xlnx_quadspi_write32(const struct device *dev,  in xlnx_quadspi_write32()  function
139 	xlnx_quadspi_write32(dev, spissr, SPISSR_OFFSET);  in xlnx_quadspi_cs_control()
157 		xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET);  in xlnx_quadspi_configure()
219 	xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET);  in xlnx_quadspi_configure()
223 		xlnx_quadspi_write32(dev, SPICR_MASTER_XFER_INH, SPICR_OFFSET);  in xlnx_quadspi_configure()
253 			xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET);  in xlnx_quadspi_start_tx()
265 		xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET);  in xlnx_quadspi_start_tx()
292 		xlnx_quadspi_write32(dev, dtr, SPI_DTR_OFFSET);  in xlnx_quadspi_start_tx()
322 		xlnx_quadspi_write32(dev, spicr | SPICR_TX_FIFO_RESET,  in xlnx_quadspi_start_tx()
332 		xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET);  in xlnx_quadspi_start_tx()
461 	xlnx_quadspi_write32(dev, BIT_MASK(config->num_ss_bits), SPISSR_OFFSET);  in xlnx_quadspi_release()
466 	xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET);  in xlnx_quadspi_release()
480 	xlnx_quadspi_write32(dev, ipisr, IPISR_OFFSET);  in xlnx_quadspi_isr()
518 	xlnx_quadspi_write32(dev, spissr, SPISSR_OFFSET);  in xlnx_quadspi_startup_block_workaround()
520 	xlnx_quadspi_write32(dev, 0x9F, SPI_DTR_OFFSET);  in xlnx_quadspi_startup_block_workaround()
521 	xlnx_quadspi_write32(dev, 0, SPI_DTR_OFFSET);  in xlnx_quadspi_startup_block_workaround()
522 	xlnx_quadspi_write32(dev, 0, SPI_DTR_OFFSET);  in xlnx_quadspi_startup_block_workaround()
525 	xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET);  in xlnx_quadspi_startup_block_workaround()
536 	xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET);  in xlnx_quadspi_startup_block_workaround()
543 	xlnx_quadspi_write32(dev, spissr, SPISSR_OFFSET);  in xlnx_quadspi_startup_block_workaround()
546 	xlnx_quadspi_write32(dev, SRR_SOFTRESET_MAGIC, SRR_OFFSET);  in xlnx_quadspi_startup_block_workaround()
561 	xlnx_quadspi_write32(dev, SRR_SOFTRESET_MAGIC, SRR_OFFSET);  in xlnx_quadspi_init()
582 	xlnx_quadspi_write32(dev, IPIXR_DTR_EMPTY, IPIER_OFFSET);  in xlnx_quadspi_init()
583 	xlnx_quadspi_write32(dev, DGIER_GIE, DGIER_OFFSET);  in xlnx_quadspi_init()