150 	uint32_t spicr;  in xlnx_quadspi_configure()  local
155 		spicr = xlnx_quadspi_read32(dev, SPICR_OFFSET);  in xlnx_quadspi_configure()
156 		spicr |= SPICR_SPE;  in xlnx_quadspi_configure()
157 		xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET);  in xlnx_quadspi_configure()
191 	spicr = SPICR_TX_FIFO_RESET | SPICR_RX_FIFO_RESET | SPICR_SPE;  in xlnx_quadspi_configure()
196 		spicr |= SPICR_MASTER | SPICR_MASTER_XFER_INH | SPICR_MANUAL_SS;  in xlnx_quadspi_configure()
200 		spicr |= SPICR_CPOL;  in xlnx_quadspi_configure()
204 		spicr |= SPICR_CPHA;  in xlnx_quadspi_configure()
208 		spicr |= SPICR_LOOP;  in xlnx_quadspi_configure()
212 		spicr |= SPICR_LSB_FIRST;  in xlnx_quadspi_configure()
219 	xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET);  in xlnx_quadspi_configure()
239 	uint32_t spicr = 0U;  in xlnx_quadspi_start_tx()  local
251 			spicr = xlnx_quadspi_read32(dev, SPICR_OFFSET);  in xlnx_quadspi_start_tx()
252 			spicr &= ~(SPICR_SPE);  in xlnx_quadspi_start_tx()
253 			xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET);  in xlnx_quadspi_start_tx()
263 		spicr = xlnx_quadspi_read32(dev, SPICR_OFFSET);  in xlnx_quadspi_start_tx()
264 		spicr |= SPICR_MASTER_XFER_INH;  in xlnx_quadspi_start_tx()
265 		xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET);  in xlnx_quadspi_start_tx()
317 		spicr = xlnx_quadspi_read32(dev, SPICR_OFFSET);  in xlnx_quadspi_start_tx()
320 			spicr &= ~(SPICR_SPE);  in xlnx_quadspi_start_tx()
322 		xlnx_quadspi_write32(dev, spicr | SPICR_TX_FIFO_RESET,  in xlnx_quadspi_start_tx()
331 		spicr &= ~(SPICR_MASTER_XFER_INH);  in xlnx_quadspi_start_tx()
332 		xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET);  in xlnx_quadspi_start_tx()
458 	uint32_t spicr;  in xlnx_quadspi_release()  local
464 	spicr = xlnx_quadspi_read32(dev, SPICR_OFFSET);  in xlnx_quadspi_release()
465 	spicr &= ~(SPICR_SPE);  in xlnx_quadspi_release()
466 	xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET);  in xlnx_quadspi_release()
509 	uint32_t spicr;  in xlnx_quadspi_startup_block_workaround()  local
524 	spicr = SPICR_MANUAL_SS | SPICR_MASTER | SPICR_SPE;  in xlnx_quadspi_startup_block_workaround()
525 	xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET);  in xlnx_quadspi_startup_block_workaround()
535 	spicr |= SPICR_MASTER_XFER_INH;  in xlnx_quadspi_startup_block_workaround()
536 	xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET);  in xlnx_quadspi_startup_block_workaround()