Lines Matching refs:SPICR_OFFSET
22 #define SPICR_OFFSET 0x60 macro
155 spicr = xlnx_quadspi_read32(dev, SPICR_OFFSET); in xlnx_quadspi_configure()
157 xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET); in xlnx_quadspi_configure()
219 xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET); in xlnx_quadspi_configure()
223 xlnx_quadspi_write32(dev, SPICR_MASTER_XFER_INH, SPICR_OFFSET); in xlnx_quadspi_configure()
251 spicr = xlnx_quadspi_read32(dev, SPICR_OFFSET); in xlnx_quadspi_start_tx()
253 xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET); in xlnx_quadspi_start_tx()
263 spicr = xlnx_quadspi_read32(dev, SPICR_OFFSET); in xlnx_quadspi_start_tx()
265 xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET); in xlnx_quadspi_start_tx()
317 spicr = xlnx_quadspi_read32(dev, SPICR_OFFSET); in xlnx_quadspi_start_tx()
323 SPICR_OFFSET); in xlnx_quadspi_start_tx()
332 xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET); in xlnx_quadspi_start_tx()
464 spicr = xlnx_quadspi_read32(dev, SPICR_OFFSET); in xlnx_quadspi_release()
466 xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET); in xlnx_quadspi_release()
525 xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET); in xlnx_quadspi_startup_block_workaround()
536 xlnx_quadspi_write32(dev, spicr, SPICR_OFFSET); in xlnx_quadspi_startup_block_workaround()