272 #define MAX_FREQ_CONTROLLER_MODE(pclk) ((pclk) / 2)  argument
273 #define MAX_FREQ_PERIPHERAL_MODE(pclk) ((pclk) / 12)  argument
277 	const uint32_t pclk;  member
314 static inline uint32_t spi_pl022_calc_prescale(const uint32_t pclk, const uint32_t baud)  in spi_pl022_calc_prescale()  argument
320 		if (pclk < (prescale + 2) * CPSDVR_MAX * baud) {  in spi_pl022_calc_prescale()
328 static inline uint32_t spi_pl022_calc_postdiv(const uint32_t pclk,  in spi_pl022_calc_postdiv()  argument
334 		if (pclk / (prescale * (postdiv - 1)) > baud) {  in spi_pl022_calc_postdiv()
349 	uint32_t pclk = 0;  in spi_pl022_configure()  local
359 	ret = clock_control_get_rate(cfg->clk_dev, cfg->clk_id, &pclk);  in spi_pl022_configure()
360 	if (ret < 0 || pclk == 0) {  in spi_pl022_configure()
365 	if (spicfg->frequency > MAX_FREQ_CONTROLLER_MODE(pclk)) {  in spi_pl022_configure()
367 			MAX_FREQ_CONTROLLER_MODE(pclk));  in spi_pl022_configure()
396 	prescale = spi_pl022_calc_prescale(pclk, spicfg->frequency);  in spi_pl022_configure()
397 	postdiv = spi_pl022_calc_postdiv(pclk, spicfg->frequency, prescale);  in spi_pl022_configure()