225 	uint32_t mem_address;  in spi_it8xxx2_tx()  local
246 		mem_address = (uint32_t)(ctx->tx_buf + SPI_CMDQ_WR_CMD_LEN_MAX) - SRAM_BASE_ADDR;  in spi_it8xxx2_tx()
247 		data->cmdq_data.data_addr_lb = BYTE_0(mem_address);  in spi_it8xxx2_tx()
248 		data->cmdq_data.data_addr_hb = BYTE_1(mem_address);  in spi_it8xxx2_tx()
249 		data->cmdq_data.check_bit_mask |= ((BYTE_2(mem_address)) & 0x03);  in spi_it8xxx2_tx()
278 	uint32_t mem_address;  in spi_it8xxx2_tx_rx()  local
305 		mem_address = (uint32_t)(ctx->tx_buf + SPI_CMDQ_WR_CMD_LEN_MAX) - SRAM_BASE_ADDR;  in spi_it8xxx2_tx_rx()
306 		data->cmdq_data.data_addr_lb = BYTE_0(mem_address);  in spi_it8xxx2_tx_rx()
307 		data->cmdq_data.data_addr_hb = BYTE_1(mem_address);  in spi_it8xxx2_tx_rx()
308 		data->cmdq_data.check_bit_mask |= ((BYTE_2(mem_address)) & 0x03);  in spi_it8xxx2_tx_rx()
324 	uint32_t cmd_address, mem_address;  in spi_it8xxx2_next_xfer()  local
353 	mem_address = (uint32_t)ctx->rx_buf - SRAM_BASE_ADDR;  in spi_it8xxx2_next_xfer()
360 			sys_write8(BYTE_0(mem_address), cfg->base + SPI0E_CH0_WR_MEM_ADDR_LB);  in spi_it8xxx2_next_xfer()
361 			sys_write8(BYTE_1(mem_address), cfg->base + SPI0F_CH0_WR_MEM_ADDR_HB);  in spi_it8xxx2_next_xfer()
362 			sys_write8(BYTE_2(mem_address), cfg->base + SPI23_CH0_WR_MEM_ADDR_HB2);  in spi_it8xxx2_next_xfer()
370 			sys_write8(BYTE_0(mem_address), cfg->base + SPI14_CH1_WR_MEM_ADDR_LB);  in spi_it8xxx2_next_xfer()
371 			sys_write8(BYTE_1(mem_address), cfg->base + SPI15_CH1_WR_MEM_ADDR_HB);  in spi_it8xxx2_next_xfer()
372 			sys_write8(BYTE_2(mem_address), cfg->base + SPI27_CH1_WR_MEM_ADDR_HB2);  in spi_it8xxx2_next_xfer()