Lines Matching refs:ssr
50 uint32_t ssr; member
154 uint8_t ssr = 0; in uart_ra_sci_err_check() local
158 ssr |= R_SCI0_SSR_ORER_Msk; in uart_ra_sci_err_check()
162 ssr |= R_SCI0_SSR_PER_Msk; in uart_ra_sci_err_check()
166 ssr |= R_SCI0_SSR_FER_Msk; in uart_ra_sci_err_check()
168 cfg->regs->SSR &= ~ssr; in uart_ra_sci_err_check()
382 ret = (cfg->regs->SCR_b.TIE == 1U) && (data->ssr & R_SCI0_SSR_FIFO_TDFE_Msk); in uart_ra_sci_irq_tx_ready()
386 ret = (cfg->regs->SCR_b.TIE == 1U) && (data->ssr & R_SCI0_SSR_TDRE_Msk); in uart_ra_sci_irq_tx_ready()
397 return (cfg->regs->SCR_b.TEIE == 1U) && (data->ssr & BIT(R_SCI0_SSR_TEND_Pos)); in uart_ra_sci_irq_tx_complete()
431 ret = (cfg->regs->SCR_b.RIE == 1U) && (data->ssr & SCI_UART_SSR_FIFO_DR_RDF); in uart_ra_sci_irq_rx_ready()
435 ret = (cfg->regs->SCR_b.RIE == 1U) && (data->ssr & R_SCI0_SSR_RDRF_Msk); in uart_ra_sci_irq_rx_ready()
460 uint8_t ssr; in uart_ra_sci_irq_is_pending() local
466 ssr = cfg->regs->SSR_FIFO; in uart_ra_sci_irq_is_pending()
468 (ssr & (R_SCI0_SSR_FIFO_TEND_Msk | R_SCI0_SSR_FIFO_TDFE_Msk))) || in uart_ra_sci_irq_is_pending()
470 ((ssr & (R_SCI0_SSR_FIFO_RDF_Msk | R_SCI0_SSR_FIFO_DR_Msk | in uart_ra_sci_irq_is_pending()
477 ssr = cfg->regs->SSR; in uart_ra_sci_irq_is_pending()
479 (ssr & (R_SCI0_SSR_TEND_Msk | R_SCI0_SSR_TDRE_Msk))) || in uart_ra_sci_irq_is_pending()
481 (ssr & (R_SCI0_SSR_RDRF_Msk | R_SCI0_SSR_PER_Msk | R_SCI0_SSR_FER_Msk | in uart_ra_sci_irq_is_pending()
495 data->ssr = cfg->regs->SSR_FIFO; in uart_ra_sci_irq_update()
496 uint8_t ssr = data->ssr ^ (R_SCI0_SSR_FIFO_ORER_Msk | R_SCI0_SSR_FIFO_FER_Msk | in uart_ra_sci_irq_update() local
498 cfg->regs->SSR_FIFO &= ssr; in uart_ra_sci_irq_update()
502 data->ssr = cfg->regs->SSR; in uart_ra_sci_irq_update()
503 uint8_t ssr = in uart_ra_sci_irq_update() local
504 data->ssr ^ (R_SCI0_SSR_ORER_Msk | R_SCI0_SSR_FER_Msk | R_SCI0_SSR_PER_Msk); in uart_ra_sci_irq_update()
505 cfg->regs->SSR_FIFO &= ssr; in uart_ra_sci_irq_update()