Lines Matching refs:index
1068 #define UART_RA_SCI_ASYNC_INIT(index) \ argument
1084 DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, irq)}, \
1087 .p_info = &uart_ra_sci_data_##index.rx_transfer_info, \
1088 .p_extend = &uart_ra_sci_data_##index.rx_transfer_cfg_extend, \
1092 .p_ctrl = &uart_ra_sci_data_##index.rx_transfer_ctrl, \
1093 .p_cfg = &uart_ra_sci_data_##index.rx_transfer_cfg, \
1111 DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, irq)}, \
1114 .p_info = &uart_ra_sci_data_##index.tx_transfer_info, \
1115 .p_extend = &uart_ra_sci_data_##index.tx_transfer_cfg_extend, \
1118 .p_ctrl = &uart_ra_sci_data_##index.tx_transfer_ctrl, \
1119 .p_cfg = &uart_ra_sci_data_##index.tx_transfer_cfg, \
1123 #define UART_RA_SCI_DTC_INIT(index) \ argument
1125 uart_ra_sci_data_##index.fsp_config.p_transfer_rx = \
1126 &uart_ra_sci_data_##index.rx_transfer; \
1127 uart_ra_sci_data_##index.fsp_config.p_transfer_tx = \
1128 &uart_ra_sci_data_##index.tx_transfer; \
1132 #define UART_RA_SCI_ASYNC_INIT(index) argument
1133 #define UART_RA_SCI_DTC_INIT(index) argument
1137 #define UART_RA_SCI_IRQ_INIT(index) \ argument
1139 R_ICU->IELSR[DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, irq)] = \
1140 ELC_EVENT_SCI_RXI(DT_INST_PROP(index, channel)); \
1141 R_ICU->IELSR[DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, irq)] = \
1142 ELC_EVENT_SCI_TXI(DT_INST_PROP(index, channel)); \
1143 R_ICU->IELSR[DT_IRQ_BY_NAME(DT_INST_PARENT(index), tei, irq)] = \
1144 ELC_EVENT_SCI_TEI(DT_INST_PROP(index, channel)); \
1145 R_ICU->IELSR[DT_IRQ_BY_NAME(DT_INST_PARENT(index), eri, irq)] = \
1146 ELC_EVENT_SCI_ERI(DT_INST_PROP(index, channel)); \
1148 IRQ_CONNECT(DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, irq), \
1149 DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, priority), \
1150 uart_ra_sci_rxi_isr, DEVICE_DT_INST_GET(index), 0); \
1151 IRQ_CONNECT(DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, irq), \
1152 DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, priority), \
1153 uart_ra_sci_txi_isr, DEVICE_DT_INST_GET(index), 0); \
1154 IRQ_CONNECT(DT_IRQ_BY_NAME(DT_INST_PARENT(index), tei, irq), \
1155 DT_IRQ_BY_NAME(DT_INST_PARENT(index), tei, priority), \
1156 uart_ra_sci_tei_isr, DEVICE_DT_INST_GET(index), 0); \
1157 IRQ_CONNECT(DT_IRQ_BY_NAME(DT_INST_PARENT(index), eri, irq), \
1158 DT_IRQ_BY_NAME(DT_INST_PARENT(index), eri, priority), \
1159 uart_ra_sci_eri_isr, DEVICE_DT_INST_GET(index), 0); \
1161 irq_enable(DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, irq)); \
1162 irq_enable(DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, irq)); \
1163 irq_enable(DT_IRQ_BY_NAME(DT_INST_PARENT(index), tei, irq)); \
1166 #define UART_RA_SCI_IRQ_INIT(index) argument
1169 #define UART_RA_SCI_INIT(index) \ argument
1170 PINCTRL_DT_DEFINE(DT_INST_PARENT(index)); \
1171 static const struct uart_ra_sci_config uart_ra_sci_config_##index = { \
1172 .pcfg = PINCTRL_DT_DEV_CONFIG_GET(DT_INST_PARENT(index)), \
1173 .regs = (R_SCI0_Type *)DT_REG_ADDR(DT_INST_PARENT(index)), \
1176 static struct uart_ra_sci_data uart_ra_sci_data_##index = { \
1179 .baudrate = DT_INST_PROP(index, current_speed), \
1183 .flow_ctrl = COND_CODE_1(DT_INST_PROP(index, hw_flow_control), \
1189 .channel = DT_INST_PROP(index, channel), \
1190 .rxi_ipl = DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, priority), \
1191 .rxi_irq = DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, irq), \
1192 .txi_ipl = DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, priority), \
1193 .txi_irq = DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, irq), \
1194 .tei_ipl = DT_IRQ_BY_NAME(DT_INST_PARENT(index), tei, priority), \
1195 .tei_irq = DT_IRQ_BY_NAME(DT_INST_PARENT(index), tei, irq), \
1196 .eri_ipl = DT_IRQ_BY_NAME(DT_INST_PARENT(index), eri, priority), \
1197 .eri_irq = DT_IRQ_BY_NAME(DT_INST_PARENT(index), eri, irq), \
1201 .dev = DEVICE_DT_INST_GET(index), \
1202 UART_RA_SCI_ASYNC_INIT(index)}; \
1204 static int uart_ra_sci_init##index(const struct device *dev) \
1206 UART_RA_SCI_IRQ_INIT(index); \
1207 UART_RA_SCI_DTC_INIT(index); \
1214 DEVICE_DT_INST_DEFINE(index, uart_ra_sci_init##index, NULL, &uart_ra_sci_data_##index, \
1215 &uart_ra_sci_config_##index, PRE_KERNEL_1, \