Lines Matching refs:pclk
489 uint32_t pclk) argument
496 return ((pclk + (baud_rate << 3)) / baud_rate) >> 4;
502 uint32_t pclk) argument
522 divisor = get_uart_baudrate_divisor(dev, baud_rate, pclk);
543 static void set_baud_rate(const struct device *dev, uint32_t baud_rate, uint32_t pclk) argument
550 if ((baud_rate != 0U) && (pclk != 0U)) {
552 divisor = get_ite_uart_baudrate_divisor(dev, baud_rate, pclk);
554 divisor = get_uart_baudrate_divisor(dev, baud_rate, pclk);
575 uint32_t pclk = 0U; local
618 pclk = dev_cfg->sys_clk_freq;
627 &pclk) != 0) {
633 set_baud_rate(dev, cfg->baudrate, pclk);
1342 uint32_t mdc, chg, pclk = 0U; local
1346 pclk = dev_cfg->sys_clk_freq;
1349 clock_control_get_rate(dev_cfg->clock_dev, dev_cfg->clock_subsys, &pclk);
1355 set_baud_rate(dev, val, pclk);